Three-quarter view Computer-generated illustration with prior AI visual review. Not a photograph, measurement or compatibility check. Independent technical and rights review pending.
Mating face Computer-generated illustration with prior AI visual review. Not a photograph, measurement or compatibility check. Independent technical and rights review pending.
Recognition drawing Original schematic, not to scale. Drawing review pending.
INTERNAL SYSTEMS / FABRIC
OCuLink refers to cabled PCIe-family hardware, not an external GPU guarantee
No. The preserved Molex Nano-Pitch I/O reference identifies OCuLink as a cabled PCIe-related connector family. A supported storage or accelerator path still depends on which PCIe lanes the particular motherboard exposes, cable assembly pin mapping, slot bifurcation, device power and firmware.
Internal high-density cabling. Original qualitative role diagram; not mechanical artwork, not to scale or a wiring map. Source context S258 · S325.
Three checks before proceeding
Check exact host-board header function, allocated lanes and BIOS options.
Use a qualified assembly with confirmed plug and receptacle ends.
Verify power supply, add-in card support and device-side use case separately.
One mistake to avoid
Treating an OCuLink-shaped jack as a universal dock, GPU or NVMe-compatible output.
Claim-specific evidence remains in the canonical record. Concept diagrams do not show any safe wiring or mechanical mating geometry.
Signal-path fieldbook
Before a cable or module is ordered.
Read the answer, keep mechanical fit separate from the signal path, and verify the named endpoint. These editorial studies reuse inherited source records; no compatibility has been laboratory confirmed.
OCuLink and MCIO cables can both carry PCIe. Can I swap their connectors?
Field answerA shared PCIe use case is not a common plug interface. Molex documents its Nano-Pitch I/O system for OCuLink applications and a separate Mini Cool Edge I/O (MCIO) family with multiple configurations. Select the exact host/cable/device assembly, not a generic “PCIe cable.”
Interpretation study, not a wiring or mating diagram. In order: Identify the board/controller and the specific socket label. / Trace the documented cable ends and the intended interface or lanes. / Confirm the device, power and mode; physical fit is not qualification. This is not evidence of a working connection.
Four checks that must stay separate
Evidence layer
What is established or still conditional
Connector / host form
S242 identifies Nano-Pitch I/O in the OCuLink context; S282 describes MCIO as a distinct multi-variant internal family.
Transport
Both product families have PCIe-related applications, but the actual lane count, generation and wiring depend on the specific system and harness.
Cable / module variant
Pitch, sideband wiring, insertion orientation, shielding and available cable configurations cannot be inferred from a shared transport label.
Manufacturer scope
These are Molex product-family overviews, not a declared OCuLink-to-MCIO passive adapter or universal pin map.
Check next, in this order
Identify the host board’s precise connector and printed or documented SFF family designation.
Match the manufacturer-approved cable assembly part number, ends, lane configuration and device role.
Check the motherboard/controller support, device endpoint, power and installation requirements before connection.
Not yet established No cross-family mechanical mating, breakout wiring, SFF-TA-1016 pinout, lane negotiation or independently tested adapter compatibility is established.
Read the claim and manufacturer source boundaries
Existing scoped claims: C240A (V39 catalogue-expansion identification fact only; not independent technical approval, fabrication data, wiring instruction, protocol guarantee or end-to-end compatibility proof.); C262A (V43 catalogue-expansion identification fact only; not independent technical approval, fabrication data, wiring instruction, protocol guarantee or end-to-end compatibility proof.). No newly authored empirical specifications; manufacturer catalogue claims remain conditional on the actual part and host.
S242 · MolexOCuLink / NPIO overview; inherited review 2026-10-05. Identification/reference scope only. V39 does not convert this source into a universal pinout, fabrication drawing, electrical approval, protocol guarantee or end-to-end compatibility verdict.
S282 · MolexMCIO connector-system overview; inherited review 2026-10-06. Identification/reference scope only. V43 does not convert this source into a universal pinout, fabrication drawing, electrical approval, protocol guarantee or end-to-end compatibility verdict.
Existing inspection dates remain unchanged. This editorial synthesis is not a physical mating test, pinout, optical budget, manufacturer device approval or deployment authorization.
The useful distinction
Recognize it. Then verify it.
OCuLink is a compact cabled PCI Express connector family represented by SFF-8611/SFF-8612-oriented implementations in storage and accelerator systems. [C240A]
Molex defines a 0.50 mm X-direction interstitial contact grid for its named NanoPitch families. Separate product and cable documents identify 173162 receptacles and the 1001531000 SFF-8611/OCuLink cable context. The grid is separate from spacing within a contact row. [C240W]
Source-scoped identification facts
Each value retains its exact example, role and measurement axis. Facts from different parts must not be combined into an invented component.
Documented examples; not a mating drawing or compatibility approval
Contact rows
2S242Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. Named series only, not every family part: Molex Nano-Pitch I/O system. Dimensions are family-page configuration example with no exactpart suffix; root should retain that scope and not imply every4/8lane variant has this size.; 12mm mated connector+cable assembly height excluded from standalone geometry. Latch option is not proof of universal mating polarization.
Contact pitch
0.5 mm X-direction interstitial contact-grid step, not uniform spacing within a row (Named Molex NanoPitch 173162/171982/171983 families)S989 · S990 · S991Current primary-source scoped values; named examples remain separate and unknowns are not inferred from illustrations. Named Molex NanoPitch series 173162/171982/171983 only, not every OCuLink part. The 0.50 mm X-direction interstitial contact grid is separate from spacing within a row and from PCB tails.
Dimensions / axis
5 mm published system connector height; 23 mm published system connector width; 9 mm published system connector depthS242Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. Named series only, not every family part: Molex Nano-Pitch I/O system. Dimensions are family-page configuration example with no exactpart suffix; root should retain that scope and not imply every4/8lane variant has this size.; 12mm mated connector+cable assembly height excluded from standalone geometry. Latch option is not proof of universal mating polarization.
Coupling / latch
Cable-side passive or active latching optionsS242Not recorded in a normalized source-scoped field. Consult the exact part/revision; no value inferred from illustrations. Named series only, not every family part: Molex Nano-Pitch I/O system. Dimensions are family-page configuration example with no exactpart suffix; root should retain that scope and not imply every4/8lane variant has this size.; 12mm mated connector+cable assembly height excluded from standalone geometry. Latch option is not proof of universal mating polarization.
Manufacturer
MolexS242Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. Named series only, not every family part: Molex Nano-Pitch I/O system. Dimensions are family-page configuration example with no exactpart suffix; root should retain that scope and not imply every4/8lane variant has this size.; 12mm mated connector+cable assembly height excluded from standalone geometry. Latch option is not proof of universal mating polarization.
Series
Nano-Pitch I/OS242Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. Named series only, not every family part: Molex Nano-Pitch I/O system. Dimensions are family-page configuration example with no exactpart suffix; root should retain that scope and not imply every4/8lane variant has this size.; 12mm mated connector+cable assembly height excluded from standalone geometry. Latch option is not proof of universal mating polarization.
Not recorded: Nominal contacts, Positions / cavity span, Populated contacts, Connector role, Contact gender / arrangement, Mounting, Keying / polarization, Shell / form, Exact part / implementation, Recorded markings, View convention. Unknown fields stay unknown; illustrations supply no measurements or pin assignments.
Recorded variant and source limits
Exact OCuLink/NPIO lane count and circuit count must be identified from the specific variant; the family name alone is insufficient.
No universal face-view numbering, fabrication geometry or protocol-generation guarantee is published.
Passive/active latch options describe retention, not an actual polarization feature. Recorded source context: Cable-side passive or active latching options / null
Not included. Check exact device and accessory documentation.
A boundary, not an omission to guess around.
Use the source-backed form or position count only for identification. Resolve ratings, protocol, direction, wiring, cable construction and exact device support from the relevant equipment and component documentation.
Before you connect
What to check
Identify the exact connector family and variant from the equipment or cable documentation.
Keep shape, contact count, protocol, electrical rating and device support as separate facts.
Do not force, rewire or adapt a connector from this recognition record; resolve the remaining requirements first.
This field note does not approve a connection, adapter, cable assembly, rewiring scheme or fabricated part. It intentionally omits unsupported pin assignments and mechanical tolerances.
AI-assisted inspection is not independent engineering review. Source scope and access limitations are disclosed below. Procedural checklists are editorial requirements, not hardware measurements.
Locator: OCuLink / NPIO overview Access: public page. Identification/reference scope only. V39 does not convert this source into a universal pinout, fabrication drawing, electrical approval, protocol guarantee or end-to-end compatibility verdict.
Molex defines a 0.50 mm X-direction interstitial contact grid for its named NanoPitch families. Separate product and cable documents identify 173162 receptacles and the 1001531000 SFF-8611/OCuLink cable context. The grid is separate from spacing within a contact row.
Locator: Complete21-page PDF retrieved; section2.1p4 explicitly0.5 mm contact spacing oriented as X-direction interstitial grid, named173162/171982/171983 families. p3scope andp5/6 distinguish PCB attachment and mating-specific drawings. Relevant sections read; no source pixels. Access: public pdf text. Grid projection is retained literally. It is not asserted as adjacent spacing within either contact row, row-to-row spacing or PCB tail pitch; exact geometry and pinout depend on part.
Locator: Complete24-page PDF retrieved; p5scope0.50mmcenterline, connector173162/171982/171983 and plug/cable100436/100203/100153/200226/200227; p6industrydocsOCuLink 1.0,SFF-8611,SFF-8612. Relevant text read, no source pixels. Access: public pdf text. Source says pin assignments vary by cable assembly and require exact sales drawing. No common pinout or end-to-end capability asserted.
Locator: Complete3-page PDF retrieved; p1note2plug mates173162receptacles; exact1001531000 row statesSFF-8611mechanical andPCIExpressOCuLink 1.0electrical specification. Exception rows0994-0998 retained separately. No source pixels inspected. Access: public pdf text. Exact named source and role only; no universal geometry, wiring, electrical compatibility or fabrication approval.
Claim scope: Named Molex NanoPitch series 173162/171982/171983 only, not every OCuLink part. The 0.50 mm X-direction interstitial contact grid is separate from spacing within a row and from PCB tails.. Next review due 2027-01-20.
Assessment 2026-10-22 · earliest scheduled source review 2027-01-03. This is a recorded-date assessment, not a live source check. Page-level independent review is not established by this panel.
Scoped support: Identifies Molex Nano-Pitch I/O as supporting PCIe OCuLink applications; V39 uses the source only to establish the OCuLink connector-family context.
Not established / limitations: Identification/reference scope only. V39 does not convert this source into a universal pinout, fabrication drawing, electrical approval, protocol guarantee or end-to-end compatibility verdict.
Scoped support: Named NanoPitch families only, not everyOCuLink component.
Not established / limitations: Grid projection is retained literally. It is not asserted as adjacent spacing within either contact row, row-to-row spacing or PCB tail pitch; exact geometry and pinout depend on part.
Locator: Complete21-page PDF retrieved; section2.1p4 explicitly0.5 mm contact spacing oriented as X-direction interstitial grid, named173162/171982/171983 families. p3scope andp5/6 distinguish PCB attachment and mating-specific drawings. Relevant sections read; no source pixels.
Scoped support: Named family and mechanical standard context only.
Not established / limitations: Source says pin assignments vary by cable assembly and require exact sales drawing. No common pinout or end-to-end capability asserted.
Locator: Complete24-page PDF retrieved; p5scope0.50mmcenterline, connector173162/171982/171983 and plug/cable100436/100203/100153/200226/200227; p6industrydocsOCuLink 1.0,SFF-8611,SFF-8612. Relevant text read, no source pixels.
Molex defines a 0.50 mm X-direction interstitial contact grid for its named NanoPitch families. Separate product and cable documents identify 173162 receptacles and the 1001531000 SFF-8611/OCuLink cable context. The grid is separate from spacing within a contact row.
Claim scope: Named Molex NanoPitch series 173162/171982/171983 only, not every OCuLink part. The 0.50 mm X-direction interstitial contact grid is separate from spacing within a row and from PCB tails.
Recorded evidence only. An inspection date, publisher label, source link or generated packet is not independent technical review, hardware testing, fabrication approval or a compatibility verdict.
