FIELD GUIDESource-led reference

E190 · Source-scoped pinout variants

8-pin +12 V CPU power connector (EPS12V form) engineering reference

Intel ATX Version 3.0 +12 V 8-pin processor-power assignment.

Source checked · no independent review claimed · Fabrication approved: no

8-pin +12 V CPU-power logical assignment original orientation schematic
Original pinout diagram; read the exact variant and view below. Not to scale.

Orientation

How to read this profile

Logical table numbering from Intel Table 5-9; V37 deliberately does not infer mating-face orientation from the assignment table.

Source-scoped identification facts

Each value retains its exact example, role and measurement axis. Facts from different parts must not be combined into an invented component.

Documented examples; not a mating drawing or compatibility approval
Nominal contacts8S198Documented position count only; V36 does not publish the electrical assignment.
Positions / cavity span8 (Claim C190E)S560Recorded source-scoped values; named examples do not describe every family variant or establish compatibility. The documented configurations are examples; connector count alone does not determine an unknown motherboard’s requirements.
Contact rows2 (Source-described array; C190A); 2 (Molex39-01-2080)S198 · S977 · S760Current primary-source scoped values; named examples remain separate and unknowns are not inferred from illustrations. V36 catalogue-expansion identification fact only; not independent technical approval, fabrication data, wiring instruction or end-to-end compatibility proof. Exact Molex39-01-2080 receptacle housing named in SSI PSDG2008v1.2.1 section4.2.2, component geometry only. Quantity context: Manufacturer Number of Rows / SSI2x4 array.
Contact pitch4.2 mm Manufacturer Pitch Mating Interface (Molex39-01-2080)S977 · S760Current primary-source scoped values; named examples remain separate and unknowns are not inferred from illustrations. Exact Molex39-01-2080 receptacle housing named in SSI PSDG2008v1.2.1 section4.2.2, component geometry only.
Connector roleplug; headerS198 · S215Recorded source-scoped values; named examples do not describe every family variant or establish compatibility. processor-power cable plug / motherboard header interface
Keying / polarizationsquare and chamfered cavities shown with latch above; exact pattern belongs to this board drawing, not a universal EPS/PCIe interchange rule (MSI B550-A PRO CPU_PWR1)S757Separate exact examples; retain each value’s source, role, axis and part scope. Exact named example MSI B550-A PRO CPU_PWR1: Device-specific eight-position CPU power header. Exact example only; no universal geometry, electrical compatibility, fabrication approval or wiring instruction. MSI is board vendor; connector OEM/series/pitch remain unknown. Do not import unrelated Molex8-position housing as an EPS equivalent.
Exact part / implementationMSI B550-A PRO CPU_PWR1 (MSI B550-A PRO CPU_PWR1)S757Separate exact examples; retain each value’s source, role, axis and part scope. Exact named example MSI B550-A PRO CPU_PWR1: Device-specific eight-position CPU power header. Exact example only; no universal geometry, electrical compatibility, fabrication approval or wiring instruction. MSI is board vendor; connector OEM/series/pitch remain unknown. Do not import unrelated Molex8-position housing as an EPS equivalent.
View conventionMSI p.34 header drawing, latch above: 8 upper-left / 5 upper-right and 4 lower-left / 1 lower-right; not cable rear view (MSI B550-A PRO CPU_PWR1)S757Separate exact examples; retain each value’s source, role, axis and part scope. Exact named example MSI B550-A PRO CPU_PWR1: Device-specific eight-position CPU power header. Exact example only; no universal geometry, electrical compatibility, fabrication approval or wiring instruction. MSI is board vendor; connector OEM/series/pitch remain unknown. Do not import unrelated Molex8-position housing as an EPS equivalent.

Not recorded: Populated contacts, Dimensions / axis, Contact gender / arrangement, Mounting, Coupling / latch, Shell / form, Manufacturer, Series, Recorded markings. Unknown fields stay unknown; illustrations supply no measurements or pin assignments.

Recorded variant and source limits
  • The normalized grid is not a physical face-view pin locator.
  • Do not equate CPU/EPS-style plugs with superficially similar PCIe auxiliary-power plugs.
  • Modular PSU-side pinouts are outside this profile.
  • Intel ATX v3 +12 V Power 8-pin connector: Contact numbers per Table 5-9.
  • SSI 2008 PSDG processor 0 / memory 2x4 connector (Molex 39-01-2080): Contact numbers per Table 4.
  • SSI 2008 PSDG processor 1 / memory 2x4 connector (Molex 39-01-2080): Contact numbers per Table 5.
  • MSI MAG B550 TOMAHAWK CPU_PWR1 board header: Board header numbering per manual diagram.
  • GIGABYTE B550 AORUS ELITE (AX) ATX_12V board header: Board header numbering per manual diagram.
  • Intel rev 2.1a eight-pin CPU power: Numbered assignments only. The retrieved Intel section supplies a table but no numbered mating-face or wire-side drawing; spatial orientation is UNVERIFIED. Do not mirror these numbers onto an unidentified cable end.
  • MSI B550-A PRO CPU_PWR1: MSI p.34 drawing, latch at top: upper endpoints 8 left, 5 right; lower endpoints 4 left, 1 right. Board view, not cable rear.
Report a correction to these facts →

Pins & wiring

Pinout

Choose the exact wiring. Pin numbers follow its stated view; a schematic does not establish physical positions. Check your exact device before wiring.

What the status labels mean
Confirmed
Recorded research passes agree within this variant; this is not independent human review or hardware validation.
Single source
Only one underlying document, or one pass, supports this assignment.
Device-specific
Supported for the named equipment or wiring only. Check your device’s manual.
Unverified
Missing or conflicting evidence. Do not wire from this row.
Not connected
The source explicitly says NC, no contact or no pin for this wiring.
Wiring variant

Intel ATX v3 +12 V Power 8-pin connector

View and evidence limits

Contact numbers per Table 5-9.

  • P190 EPS12V 8-pin — **Agree**: 1-4 return, 5-8 +12 V — Same Intel revision in both passes; different MSI board manuals, plus SSI and GIGABYTE in A. SSI's processor-specific rail names remain separate. Neither pass obtained the normative EPS12V guide itself.
  • The SSI EPS12V Power Supply Design Guide (e.g. v2.91/v2.92) was not found on an official SSI/SNIA host; only a third-party mirror was located and it was not used. The EPS12V document's own table is therefore not cited; the same 2x4 contact functions are verified from Intel ATX v3 and the SSI 2008 PSDG.
8-pin +12 V CPU-power logical assignmentContact numbers per Table 5-9.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: COM (confirmed)12: COM (confirmed)23: COM (confirmed)34: COM (confirmed)45: +12V2 DC (confirmed)56: +12V2 DC (confirmed)67: +12V2 DC (confirmed)78: +12V2 DC (confirmed)8powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
Intel ATX v3 +12 V Power 8-pin connector — source-scoped contact map
PinSignalWhat it doesStatus
1COMGround reference and return.Confirmed
Sources
2COMGround reference and return.Confirmed
Sources
3COMGround reference and return.Confirmed
Sources
4COMGround reference and return.Confirmed
Sources
5+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
6+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
7+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
8+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
Sources (3)

SSI 2008 PSDG processor 0 / memory 2x4 connector (Molex 39-01-2080)

View and evidence limits

Contact numbers per Table 4.

  • P190 EPS12V 8-pin — **Agree**: 1-4 return, 5-8 +12 V — Same Intel revision in both passes; different MSI board manuals, plus SSI and GIGABYTE in A. SSI's processor-specific rail names remain separate. Neither pass obtained the normative EPS12V guide itself.
  • The SSI EPS12V Power Supply Design Guide (e.g. v2.91/v2.92) was not found on an official SSI/SNIA host; only a third-party mirror was located and it was not used. The EPS12V document's own table is therefore not cited; the same 2x4 contact functions are verified from Intel ATX v3 and the SSI 2008 PSDG.
8-pin +12 V CPU-power logical assignmentContact numbers per Table 4.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: COM (confirmed)12: COM (confirmed)23: COM (confirmed)34: COM (confirmed)45: +12 V1 (single_source)56: +12 V1 (single_source)67: +12 V3a (single_source)78: +12 V3a (single_source)8powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
SSI 2008 PSDG processor 0 / memory 2x4 connector (Molex 39-01-2080) — source-scoped contact map
PinSignalWhat it doesStatus
1COMGround reference and return.Confirmed
Sources
2COMGround reference and return.Confirmed
Sources
3COMGround reference and return.Confirmed
Sources
4COMGround reference and return.Confirmed
Sources
5+12 V1Power connection (+12 V1). Check the specified supply.Single source
Sources
6+12 V1Power connection (+12 V1). Check the specified supply.Single source
Sources
7+12 V3aPower connection (+12 V3a). Check the specified supply.Single source
Sources
8+12 V3aPower connection (+12 V3a). Check the specified supply.Single source
Sources
Sources (3)

SSI 2008 PSDG processor 1 / memory 2x4 connector (Molex 39-01-2080)

View and evidence limits

Contact numbers per Table 5.

  • P190 EPS12V 8-pin — **Agree**: 1-4 return, 5-8 +12 V — Same Intel revision in both passes; different MSI board manuals, plus SSI and GIGABYTE in A. SSI's processor-specific rail names remain separate. Neither pass obtained the normative EPS12V guide itself.
  • The SSI EPS12V Power Supply Design Guide (e.g. v2.91/v2.92) was not found on an official SSI/SNIA host; only a third-party mirror was located and it was not used. The EPS12V document's own table is therefore not cited; the same 2x4 contact functions are verified from Intel ATX v3 and the SSI 2008 PSDG.
8-pin +12 V CPU-power logical assignmentContact numbers per Table 5.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: COM (confirmed)12: COM (confirmed)23: COM (confirmed)34: COM (confirmed)45: +12 V2 (confirmed)56: +12 V2 (confirmed)67: +12 V3b (single_source)78: +12 V3b (single_source)8powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
SSI 2008 PSDG processor 1 / memory 2x4 connector (Molex 39-01-2080) — source-scoped contact map
PinSignalWhat it doesStatus
1COMGround reference and return.Confirmed
Sources
2COMGround reference and return.Confirmed
Sources
3COMGround reference and return.Confirmed
Sources
4COMGround reference and return.Confirmed
Sources
5+12 V2Power connection (+12 V2). Check the specified supply.Confirmed
Sources
6+12 V2Power connection (+12 V2). Check the specified supply.Confirmed
Sources
7+12 V3bPower connection (+12 V3b). Check the specified supply.Single source
Sources
8+12 V3bPower connection (+12 V3b). Check the specified supply.Single source
Sources
Sources (3)

MSI MAG B550 TOMAHAWK CPU_PWR1 board header

Device-specific wiring. Check your device’s manual before connecting or applying power.

View and evidence limits

Board header numbering per manual diagram.

  • P190 EPS12V 8-pin — **Agree**: 1-4 return, 5-8 +12 V — Same Intel revision in both passes; different MSI board manuals, plus SSI and GIGABYTE in A. SSI's processor-specific rail names remain separate. Neither pass obtained the normative EPS12V guide itself.
  • The SSI EPS12V Power Supply Design Guide (e.g. v2.91/v2.92) was not found on an official SSI/SNIA host; only a third-party mirror was located and it was not used. The EPS12V document's own table is therefore not cited; the same 2x4 contact functions are verified from Intel ATX v3 and the SSI 2008 PSDG.
8-pin +12 V CPU-power logical assignmentBoard header numbering per manual diagram.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: Ground (device_specific)12: Ground (device_specific)23: Ground (device_specific)34: Ground (device_specific)45: +12V (device_specific)56: +12V (device_specific)67: +12V (device_specific)78: +12V (device_specific)8powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
MSI MAG B550 TOMAHAWK CPU_PWR1 board header — source-scoped contact map
PinSignalWhat it doesStatus
1GroundGround reference and return.Device-specific
Sources
2GroundGround reference and return.Device-specific
Sources
3GroundGround reference and return.Device-specific
Sources
4GroundGround reference and return.Device-specific
Sources
5+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
6+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
7+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
8+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
Sources (1)

GIGABYTE B550 AORUS ELITE (AX) ATX_12V board header

Device-specific wiring. Check your device’s manual before connecting or applying power.

View and evidence limits

Board header numbering per manual diagram.

  • P190 EPS12V 8-pin — **Agree**: 1-4 return, 5-8 +12 V — Same Intel revision in both passes; different MSI board manuals, plus SSI and GIGABYTE in A. SSI's processor-specific rail names remain separate. Neither pass obtained the normative EPS12V guide itself.
  • The SSI EPS12V Power Supply Design Guide (e.g. v2.91/v2.92) was not found on an official SSI/SNIA host; only a third-party mirror was located and it was not used. The EPS12V document's own table is therefore not cited; the same 2x4 contact functions are verified from Intel ATX v3 and the SSI 2008 PSDG.
8-pin +12 V CPU-power logical assignmentBoard header numbering per manual diagram.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: GND (Only for 2x4-pin 12V) (device_specific)12: GND (Only for 2x4-pin 12V) (device_specific)23: GND (device_specific)34: GND (device_specific)45: +12V (Only for 2x4-pin 12V) (device_specific)56: +12V (Only for 2x4-pin 12V) (device_specific)67: +12V (device_specific)78: +12V (device_specific)8powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
GIGABYTE B550 AORUS ELITE (AX) ATX_12V board header — source-scoped contact map
PinSignalWhat it doesStatus
1GND (Only for 2x4-pin 12V)Ground reference and return.Device-specific
Sources
2GND (Only for 2x4-pin 12V)Ground reference and return.Device-specific
Sources
3GNDGround reference and return.Device-specific
Sources
4GNDGround reference and return.Device-specific
Sources
5+12V (Only for 2x4-pin 12V)Power connection (+12V (Only for 2x4-pin 12V)). Check the specified supply.Device-specific
Sources
6+12V (Only for 2x4-pin 12V)Power connection (+12V (Only for 2x4-pin 12V)). Check the specified supply.Device-specific
Sources
7+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
8+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
Sources (1)

Intel rev 2.1a eight-pin CPU power

View and evidence limits

Numbered assignments only. The retrieved Intel section supplies a table but no numbered mating-face or wire-side drawing; spatial orientation is UNVERIFIED. Do not mirror these numbers onto an unidentified cable end.

  • P190 EPS12V 8-pin — **Agree**: 1-4 return, 5-8 +12 V — Same Intel revision in both passes; different MSI board manuals, plus SSI and GIGABYTE in A. SSI's processor-specific rail names remain separate. Neither pass obtained the normative EPS12V guide itself.
  • SSI EPS12V full text was not obtained. Verified scope is the named Intel table and MSI implementation; proprietary PSU-end wiring is unverified.
8-pin +12 V CPU-power logical assignmentNumbered assignments only. The retrieved Intel section supplies a table but no numbered mating-face or wire-side drawing; spatial orientation is UNVERIFIED. Do not mirror these numbers onto an unidentified cable end.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: COM (confirmed)12: COM (confirmed)23: COM (confirmed)34: COM (confirmed)45: +12V2 DC (confirmed)56: +12V2 DC (confirmed)67: +12V2 DC (confirmed)78: +12V2 DC (confirmed)8powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
Intel rev 2.1a eight-pin CPU power — source-scoped contact map
PinSignalWhat it doesStatus
1COMGround reference and return.Confirmed
Sources
2COMGround reference and return.Confirmed
Sources
3COMGround reference and return.Confirmed
Sources
4COMGround reference and return.Confirmed
Sources
5+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
6+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
7+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
8+12V2 DCPower connection (+12V2 DC). Check the specified supply.Confirmed
Sources
Sources (5)

MSI B550-A PRO CPU_PWR1

Device-specific wiring. Check your device’s manual before connecting or applying power.

View and evidence limits

MSI p.34 drawing, latch at top: upper endpoints 8 left, 5 right; lower endpoints 4 left, 1 right. Board view, not cable rear.

  • P190 EPS12V 8-pin — **Agree**: 1-4 return, 5-8 +12 V — Same Intel revision in both passes; different MSI board manuals, plus SSI and GIGABYTE in A. SSI's processor-specific rail names remain separate. Neither pass obtained the normative EPS12V guide itself.
  • SSI EPS12V full text was not obtained. Verified scope is the named Intel table and MSI implementation; proprietary PSU-end wiring is unverified.
8-pin +12 V CPU-power logical assignmentMSI p.34 drawing, latch at top: upper endpoints 8 left, 5 right; lower endpoints 4 left, 1 right. Board view, not cable rear.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: Ground (device_specific)12: Ground (device_specific)23: Ground (device_specific)34: Ground (device_specific)45: +12V (device_specific)56: +12V (device_specific)67: +12V (device_specific)78: +12V (device_specific)8powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
MSI B550-A PRO CPU_PWR1 — source-scoped contact map
PinSignalWhat it doesStatus
1GroundGround reference and return.Device-specific
Sources
2GroundGround reference and return.Device-specific
Sources
3GroundGround reference and return.Device-specific
Sources
4GroundGround reference and return.Device-specific
Sources
5+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
6+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
7+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
8+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
Sources (1)

Unknowns stay unknown.

  • The normalized grid is not a physical face-view pin locator.
  • Do not equate CPU/EPS-style plugs with superficially similar PCIe auxiliary-power plugs.
  • Modular PSU-side pinouts are outside this profile.

Your next step

Use the detail without guessing past its limits.

Source trail

Claims and sources

C190Asource checked

Intel documents an 8-pin / 2x4 +12 V processor-power connector form in the cited ATX design guide.

Intel · ATX Version 3.0 — +12 V Power Connector ↗
+12 V CPU power connector section · Identification/reference scope only. V36 does not convert this source into a universal pinout, fabrication drawing, electrical approval or end-to-end compatibility verdict.

C190Bsource checked

Intel ATX Version 3.0 Table 5-9 assigns positions 1–4 of the documented 8-pin +12 V processor-power connector to COM and positions 5–8 to +12V2 DC.

Intel · ATX Version 3.0 — +12 V 8-pin power connector pin-out ↗
Table 5-9 +12 V Power 8 Pin Connector Pin-Out · Logical assignment table only. V37 does not infer modular-PSU pinouts, face orientation or safe substitution from the motherboard-side standard connector.

C806Csource checked

Intel ATX v3 +12 V Power 8-pin connector: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Intel Corporation · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide ↗
Revision history entry for 2.1 (printed p. 13): 12VHPWR renamed 12V-2x6 throughout, 'Cable Plug' side unchanged; Section 5.2.2.4.3 'Special Note on 12V-2x6 vs. 12VHPWR connectors' (printed p. 61); Table 5-7 (printed p. 66); Section 5.2.2.1, Table 5-1 Main Power Connector Pin-Out, printed p. 55; Section 5.2.2.2 Peripheral Connectors (AMP 1-480424-0 or Molex 15-24-4048), Table 5-2 Peripheral Connector Pin-out, printed pp. 55-56; Section 5.2.2.3 Floppy Drive Connector - Do Not Include (For Historical Reference Only), AMP 171822-4, Table 5-3 Floppy Connector Pin-out, printed p. 56; Section 5.2.2.4.1, Table 5-4 PCIe 2x3 Auxiliary Power Connector Pin Assignment (75 watts) and note 2, printed p. 57; Section 5.2.2.4.2, Table 5-5 PCIe 2x4 Auxiliary Power Connector Pin Assignment (150 Watts) and Table 5-6 Sense Pin Decoding, printed p. 58; Section 5.2.2.4.3, Table 5-7 PCIe 12V-2x6 Auxiliary Power Connector Pin Assignment (600 watts), printed p. 66; sideband definitions Section 3.3 and Table 3-6, printed pp. 29-32; Section 5.2.2.5, Table 5-9 +12 V Power 8 pin Connector Pin-Out, printed p. 67 · Source scope and unresolved evidence are preserved in the engineering variant.

Micro-Star International (MSI) · B550-A PRO User Guide ↗
printed/PDF p.33, JAUD1: Front Audio Connector, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, ATX_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, CPU_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.37, JUSB1~2: USB 2.0 Connectors, numbered drawing and Pin/Signal Name table; printed/PDF p.38, CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors, PWM Mode and DC Mode pin definition tables and mode explanation, numbered drawing and Pin/Signal Name table; printed/PDF p.40, JRGB1: RGB LED connector, numbered drawing and Pin/Signal Name table; printed/PDF p.41, JRAINBOW1~2: Addressable RGB LED connectors, numbered drawing and Pin/Signal Name table · Source scope and unresolved evidence are preserved in the engineering variant.

Intel Corporation · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide ↗
Mechanical > Connectors > DC Connectors > +12 V Power Connector, Table 5-9: +12 V Power 8 pin Connector Pin-Out · Source scope and unresolved evidence are preserved in the engineering variant.

C806Dsource checked

SSI 2008 PSDG processor 0 / memory 2x4 connector (Molex 39-01-2080): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Micro-Star International (MSI) · B550-A PRO User Guide ↗
printed/PDF p.33, JAUD1: Front Audio Connector, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, ATX_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, CPU_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.37, JUSB1~2: USB 2.0 Connectors, numbered drawing and Pin/Signal Name table; printed/PDF p.38, CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors, PWM Mode and DC Mode pin definition tables and mode explanation, numbered drawing and Pin/Signal Name table; printed/PDF p.40, JRGB1: RGB LED connector, numbered drawing and Pin/Signal Name table; printed/PDF p.41, JRAINBOW1~2: Addressable RGB LED connectors, numbered drawing and Pin/Signal Name table · Source scope and unresolved evidence are preserved in the engineering variant.

SSI Forum (archive hosted by SNIA) · Power Supply Design Guideline for 2008 Dual-Socket Servers and Workstations (A Server System Infrastructure Specification) ↗
Section 4.2.1, Table 3 P1 Baseboard Power Connector, printed p. 10; Section 4.2.2, Table 4 Processor 0 / memory power Connector, printed p. 12; Section 4.2.2, Table 5 Processor 1 / memory power Connector, printed p. 12; Section 4.2.4, Table 7 Peripheral Power Connectors (Amp 1-480424-0), printed p. 13; Section 4.2.5, Table 8 Floppy Power Connector (Amp 171822-4), printed p. 13; Section 4.2.8, Table 11 PCI Express Graphic Card Power Connector(s), printed p. 15 · Source scope and unresolved evidence are preserved in the engineering variant.

Intel Corporation · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide ↗
Mechanical > Connectors > DC Connectors > +12 V Power Connector, Table 5-9: +12 V Power 8 pin Connector Pin-Out · Source scope and unresolved evidence are preserved in the engineering variant.

C806Esource checked

SSI 2008 PSDG processor 1 / memory 2x4 connector (Molex 39-01-2080): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Micro-Star International (MSI) · B550-A PRO User Guide ↗
printed/PDF p.33, JAUD1: Front Audio Connector, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, ATX_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, CPU_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.37, JUSB1~2: USB 2.0 Connectors, numbered drawing and Pin/Signal Name table; printed/PDF p.38, CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors, PWM Mode and DC Mode pin definition tables and mode explanation, numbered drawing and Pin/Signal Name table; printed/PDF p.40, JRGB1: RGB LED connector, numbered drawing and Pin/Signal Name table; printed/PDF p.41, JRAINBOW1~2: Addressable RGB LED connectors, numbered drawing and Pin/Signal Name table · Source scope and unresolved evidence are preserved in the engineering variant.

SSI Forum (archive hosted by SNIA) · Power Supply Design Guideline for 2008 Dual-Socket Servers and Workstations (A Server System Infrastructure Specification) ↗
Section 4.2.1, Table 3 P1 Baseboard Power Connector, printed p. 10; Section 4.2.2, Table 4 Processor 0 / memory power Connector, printed p. 12; Section 4.2.2, Table 5 Processor 1 / memory power Connector, printed p. 12; Section 4.2.4, Table 7 Peripheral Power Connectors (Amp 1-480424-0), printed p. 13; Section 4.2.5, Table 8 Floppy Power Connector (Amp 171822-4), printed p. 13; Section 4.2.8, Table 11 PCI Express Graphic Card Power Connector(s), printed p. 15 · Source scope and unresolved evidence are preserved in the engineering variant.

Intel Corporation · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide ↗
Mechanical > Connectors > DC Connectors > +12 V Power Connector, Table 5-9: +12 V Power 8 pin Connector Pin-Out · Source scope and unresolved evidence are preserved in the engineering variant.

C806Fsource checked

MSI MAG B550 TOMAHAWK CPU_PWR1 board header: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Micro-Star International (MSI) · MAG B550 TOMAHAWK Motherboard User Guide (multilingual) ↗
English section, 'CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors', PWM Mode and DC Mode pin definition tables, printed p. 23; English section, 'CPU_PWR1, ATX_PWR1: Power Connectors', CPU_PWR1 table, printed p. 20; English section, 'JAUD1: Front Audio Connector' table, printed p. 19; English section, 'JRAINBOW1~2: Addressable RGB LED connectors' table, printed p. 27; English section, 'JRGB1~2: RGB LED connectors' table, printed p. 26; English section, 'JUSB1~2: USB 2.0 Connectors' table, printed p. 22; English section, Overview of Components, 'CPU_PWR1, ATX_PWR1: Power Connectors', ATX_PWR1 table, printed p. 20 · Source scope and unresolved evidence are preserved in the engineering variant.

C806Gsource checked

GIGABYTE B550 AORUS ELITE (AX) ATX_12V board header: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

GIGA-BYTE Technology · B550 AORUS ELITE / B550 AORUS ELITE AX User's Manual ↗
Chapter 1, item 1/2) ATX_12V/ATX, 'ATX:' pin table, printed p. 15; Chapter 1, item 1/2) ATX_12V/ATX, 'ATX_12V:' pin table, printed p. 15; Chapter 1, item 12) F_AUDIO (Front Panel Audio Header), High Definition audio table, printed p. 19; Chapter 1, item 14) F_USB1/F_USB2 (USB 2.0/1.1 Headers) table, printed p. 20; Chapter 1, item 3/4) CPU_FAN/SYS_FAN1/2/3 (Fan Headers) pin table, printed p. 15; item 5) CPU_OPT, printed p. 16; Chapter 1, item 7) D_LED1/D_LED2 (Addressable LED Strip Headers), printed p. 16; Chapter 1, item 8) LED_C1/LED_C2 (RGB LED Strip Headers), printed p. 17; item 6) LED_CPU, printed p. 16 · Source scope and unresolved evidence are preserved in the engineering variant.

C806Hsource checked

Intel rev 2.1a eight-pin CPU power: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Intel Corporation · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide ↗
Revision history entry for 2.1 (printed p. 13): 12VHPWR renamed 12V-2x6 throughout, 'Cable Plug' side unchanged; Section 5.2.2.4.3 'Special Note on 12V-2x6 vs. 12VHPWR connectors' (printed p. 61); Table 5-7 (printed p. 66); Section 5.2.2.1, Table 5-1 Main Power Connector Pin-Out, printed p. 55; Section 5.2.2.2 Peripheral Connectors (AMP 1-480424-0 or Molex 15-24-4048), Table 5-2 Peripheral Connector Pin-out, printed pp. 55-56; Section 5.2.2.3 Floppy Drive Connector - Do Not Include (For Historical Reference Only), AMP 171822-4, Table 5-3 Floppy Connector Pin-out, printed p. 56; Section 5.2.2.4.1, Table 5-4 PCIe 2x3 Auxiliary Power Connector Pin Assignment (75 watts) and note 2, printed p. 57; Section 5.2.2.4.2, Table 5-5 PCIe 2x4 Auxiliary Power Connector Pin Assignment (150 Watts) and Table 5-6 Sense Pin Decoding, printed p. 58; Section 5.2.2.4.3, Table 5-7 PCIe 12V-2x6 Auxiliary Power Connector Pin Assignment (600 watts), printed p. 66; sideband definitions Section 3.3 and Table 3-6, printed pp. 29-32; Section 5.2.2.5, Table 5-9 +12 V Power 8 pin Connector Pin-Out, printed p. 67 · Source scope and unresolved evidence are preserved in the engineering variant.

SSI Forum (archive hosted by SNIA) · Power Supply Design Guideline for 2008 Dual-Socket Servers and Workstations (A Server System Infrastructure Specification) ↗
Section 4.2.1, Table 3 P1 Baseboard Power Connector, printed p. 10; Section 4.2.2, Table 4 Processor 0 / memory power Connector, printed p. 12; Section 4.2.2, Table 5 Processor 1 / memory power Connector, printed p. 12; Section 4.2.4, Table 7 Peripheral Power Connectors (Amp 1-480424-0), printed p. 13; Section 4.2.5, Table 8 Floppy Power Connector (Amp 171822-4), printed p. 13; Section 4.2.8, Table 11 PCI Express Graphic Card Power Connector(s), printed p. 15 · Source scope and unresolved evidence are preserved in the engineering variant.

Micro-Star International (MSI) · MAG B550 TOMAHAWK Motherboard User Guide (multilingual) ↗
English section, 'CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors', PWM Mode and DC Mode pin definition tables, printed p. 23; English section, 'CPU_PWR1, ATX_PWR1: Power Connectors', CPU_PWR1 table, printed p. 20; English section, 'JAUD1: Front Audio Connector' table, printed p. 19; English section, 'JRAINBOW1~2: Addressable RGB LED connectors' table, printed p. 27; English section, 'JRGB1~2: RGB LED connectors' table, printed p. 26; English section, 'JUSB1~2: USB 2.0 Connectors' table, printed p. 22; English section, Overview of Components, 'CPU_PWR1, ATX_PWR1: Power Connectors', ATX_PWR1 table, printed p. 20 · Source scope and unresolved evidence are preserved in the engineering variant.

GIGA-BYTE Technology · B550 AORUS ELITE / B550 AORUS ELITE AX User's Manual ↗
Chapter 1, item 1/2) ATX_12V/ATX, 'ATX:' pin table, printed p. 15; Chapter 1, item 1/2) ATX_12V/ATX, 'ATX_12V:' pin table, printed p. 15; Chapter 1, item 12) F_AUDIO (Front Panel Audio Header), High Definition audio table, printed p. 19; Chapter 1, item 14) F_USB1/F_USB2 (USB 2.0/1.1 Headers) table, printed p. 20; Chapter 1, item 3/4) CPU_FAN/SYS_FAN1/2/3 (Fan Headers) pin table, printed p. 15; item 5) CPU_OPT, printed p. 16; Chapter 1, item 7) D_LED1/D_LED2 (Addressable LED Strip Headers), printed p. 16; Chapter 1, item 8) LED_C1/LED_C2 (RGB LED Strip Headers), printed p. 17; item 6) LED_CPU, printed p. 16 · Source scope and unresolved evidence are preserved in the engineering variant.

Intel Corporation · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide ↗
Mechanical > Connectors > DC Connectors > +12 V Power Connector, Table 5-9: +12 V Power 8 pin Connector Pin-Out · Source scope and unresolved evidence are preserved in the engineering variant.

C806Isource checked

MSI B550-A PRO CPU_PWR1: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Micro-Star International (MSI) · B550-A PRO User Guide ↗
printed/PDF p.33, JAUD1: Front Audio Connector, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, ATX_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, CPU_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.37, JUSB1~2: USB 2.0 Connectors, numbered drawing and Pin/Signal Name table; printed/PDF p.38, CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors, PWM Mode and DC Mode pin definition tables and mode explanation, numbered drawing and Pin/Signal Name table; printed/PDF p.40, JRGB1: RGB LED connector, numbered drawing and Pin/Signal Name table; printed/PDF p.41, JRAINBOW1~2: Addressable RGB LED connectors, numbered drawing and Pin/Signal Name table · Source scope and unresolved evidence are preserved in the engineering variant.

C190Wsource checked

SSI names Molex 39-01-2080 for its eight-position 2 × 4 processor/memory power connector. The exact Molex housing specification lists two rows and 4.20 mm mating-interface pitch.

Molex · Molex39-01-2080/39012080 receptacle housing physical specifications ↗
Physical Specifications: Number Of Rows2; Pitch Mating Interface4.20mm; Keywords39-01-2080/0039012080. SSI S760 section4.2.2 PDF/printedp12 explicitly names this eight-position housing and2x4 processor/memory connectors; full PDF text and150dpi page pixels inspected. · Empty housing is not assembled EPS harness. No loaded contacts, cable wiring, PSU-side shape, generic Mini-Fit key pattern or power compatibility established; live page says Limited Information Available.

SSI Forum (archive hosted by SNIA) · Power Supply Design Guideline for 2008 Dual-Socket Servers and Workstations (A Server System Infrastructure Specification) ↗
Section 4.2.1, Table 3 P1 Baseboard Power Connector, printed p. 10; Section 4.2.2, Table 4 Processor 0 / memory power Connector, printed p. 12; Section 4.2.2, Table 5 Processor 1 / memory power Connector, printed p. 12; Section 4.2.4, Table 7 Peripheral Power Connectors (Amp 1-480424-0), printed p. 13; Section 4.2.5, Table 8 Floppy Power Connector (Amp 171822-4), printed p. 13; Section 4.2.8, Table 11 PCI Express Graphic Card Power Connector(s), printed p. 15 · Source scope and unresolved evidence are preserved in the engineering variant.

9 source records support this profile. No independent engineering review or hardware validation is claimed.

Evidence behind this page

Scope first. Source second. Approval separate.

9 linked sources · 10 scoped claims · 0 sources with inspection/access flags.

Page scope: Original V37 logical-assignment schematic; not to scale and not a mating-face or manufacturing drawing.

Assessment 2026-10-22 · earliest scheduled source review 2027-01-03. This is a recorded-date assessment, not a live source check. Page-level independent review is not established by this panel.

Inspect 9 source scopes, access limits and dates

S198 · ATX Version 3.0 — +12 V Power Connector

Intel · Manufacturer / product-owner domain · inspected 2026-10-05 · due 2027-01-03

Within inspection window

Scoped support: Documents 4-pin and 8-pin +12 V processor power connector forms; V36 uses only the 8-pin form for identification.

Not established / limitations: Identification/reference scope only. V36 does not convert this source into a universal pinout, fabrication drawing, electrical approval or end-to-end compatibility verdict.

Locator: +12 V CPU power connector section

S215 · ATX Version 3.0 — +12 V 8-pin power connector pin-out

Intel · Manufacturer / product-owner domain · inspected 2026-10-05 · due 2027-01-03

Within inspection window

Scoped support: Engineering-sidecar source for the documented 8-position +12 V processor-power logical assignments.

Not established / limitations: Logical assignment table only. V37 does not infer modular-PSU pinouts, face orientation or safe substitution from the motherboard-side standard connector.

Locator: Table 5-9 +12 V Power 8 Pin Connector Pin-Out

S755 · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide

Intel Corporation · Manufacturer / product-owner domain · inspected 2026-10-20 · due 2027-01-18

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: Revision history entry for 2.1 (printed p. 13): 12VHPWR renamed 12V-2x6 throughout, 'Cable Plug' side unchanged; Section 5.2.2.4.3 'Special Note on 12V-2x6 vs. 12VHPWR connectors' (printed p. 61); Table 5-7 (printed p. 66); Section 5.2.2.1, Table 5-1 Main Power Connector Pin-Out, printed p. 55; Section 5.2.2.2 Peripheral Connectors (AMP 1-480424-0 or Molex 15-24-4048), Table 5-2 Peripheral Connector Pin-out, printed pp. 55-56; Section 5.2.2.3 Floppy Drive Connector - Do Not Include (For Historical Reference Only), AMP 171822-4, Table 5-3 Floppy Connector Pin-out, printed p. 56; Section 5.2.2.4.1, Table 5-4 PCIe 2x3 Auxiliary Power Connector Pin Assignment (75 watts) and note 2, printed p. 57; Section 5.2.2.4.2, Table 5-5 PCIe 2x4 Auxiliary Power Connector Pin Assignment (150 Watts) and Table 5-6 Sense Pin Decoding, printed p. 58; Section 5.2.2.4.3, Table 5-7 PCIe 12V-2x6 Auxiliary Power Connector Pin Assignment (600 watts), printed p. 66; sideband definitions Section 3.3 and Table 3-6, printed pp. 29-32; Section 5.2.2.5, Table 5-9 +12 V Power 8 pin Connector Pin-Out, printed p. 67

S757 · B550-A PRO User Guide

Micro-Star International (MSI) · Unclassified publisher domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: printed/PDF p.33, JAUD1: Front Audio Connector, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, ATX_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.34, CPU_PWR1, ATX_PWR1: Power Connectors, CPU_PWR1, numbered drawing and Pin/Signal Name table; printed/PDF p.37, JUSB1~2: USB 2.0 Connectors, numbered drawing and Pin/Signal Name table; printed/PDF p.38, CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors, PWM Mode and DC Mode pin definition tables and mode explanation, numbered drawing and Pin/Signal Name table; printed/PDF p.40, JRGB1: RGB LED connector, numbered drawing and Pin/Signal Name table; printed/PDF p.41, JRAINBOW1~2: Addressable RGB LED connectors, numbered drawing and Pin/Signal Name table

S760 · Power Supply Design Guideline for 2008 Dual-Socket Servers and Workstations (A Server System Infrastructure Specification)

SSI Forum (archive hosted by SNIA) · Standards-organization domain · inspected 2026-10-20 · due 2027-01-18

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: Section 4.2.1, Table 3 P1 Baseboard Power Connector, printed p. 10; Section 4.2.2, Table 4 Processor 0 / memory power Connector, printed p. 12; Section 4.2.2, Table 5 Processor 1 / memory power Connector, printed p. 12; Section 4.2.4, Table 7 Peripheral Power Connectors (Amp 1-480424-0), printed p. 13; Section 4.2.5, Table 8 Floppy Power Connector (Amp 171822-4), printed p. 13; Section 4.2.8, Table 11 PCI Express Graphic Card Power Connector(s), printed p. 15

S761 · MAG B550 TOMAHAWK Motherboard User Guide (multilingual)

Micro-Star International (MSI) · Unclassified publisher domain · inspected 2026-10-20 · due 2027-01-18

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: English section, 'CPU_FAN1, PUMP_FAN1, SYS_FAN1~6: Fan Connectors', PWM Mode and DC Mode pin definition tables, printed p. 23; English section, 'CPU_PWR1, ATX_PWR1: Power Connectors', CPU_PWR1 table, printed p. 20; English section, 'JAUD1: Front Audio Connector' table, printed p. 19; English section, 'JRAINBOW1~2: Addressable RGB LED connectors' table, printed p. 27; English section, 'JRGB1~2: RGB LED connectors' table, printed p. 26; English section, 'JUSB1~2: USB 2.0 Connectors' table, printed p. 22; English section, Overview of Components, 'CPU_PWR1, ATX_PWR1: Power Connectors', ATX_PWR1 table, printed p. 20

S762 · B550 AORUS ELITE / B550 AORUS ELITE AX User's Manual

GIGA-BYTE Technology · Unclassified publisher domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: Chapter 1, item 1/2) ATX_12V/ATX, 'ATX:' pin table, printed p. 15; Chapter 1, item 1/2) ATX_12V/ATX, 'ATX_12V:' pin table, printed p. 15; Chapter 1, item 12) F_AUDIO (Front Panel Audio Header), High Definition audio table, printed p. 19; Chapter 1, item 14) F_USB1/F_USB2 (USB 2.0/1.1 Headers) table, printed p. 20; Chapter 1, item 3/4) CPU_FAN/SYS_FAN1/2/3 (Fan Headers) pin table, printed p. 15; item 5) CPU_OPT, printed p. 16; Chapter 1, item 7) D_LED1/D_LED2 (Addressable LED Strip Headers), printed p. 16; Chapter 1, item 8) LED_C1/LED_C2 (RGB LED Strip Headers), printed p. 17; item 6) LED_CPU, printed p. 16

S763 · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide

Intel Corporation · Manufacturer / product-owner domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: Mechanical > Connectors > DC Connectors > +12 V Power Connector, Table 5-9: +12 V Power 8 pin Connector Pin-Out

S977 · Molex39-01-2080/39012080 receptacle housing physical specifications

Molex · Manufacturer / product-owner domain · inspected 2026-10-22 · due 2027-01-20

Within inspection window

Scoped support: Exact housing binding to SSI processor/memory power connectors.

Not established / limitations: Empty housing is not assembled EPS harness. No loaded contacts, cable wiring, PSU-side shape, generic Mini-Fit key pattern or power compatibility established; live page says Limited Information Available.

Locator: Physical Specifications: Number Of Rows2; Pitch Mating Interface4.20mm; Keywords39-01-2080/0039012080. SSI S760 section4.2.2 PDF/printedp12 explicitly names this eight-position housing and2x4 processor/memory connectors; full PDF text and150dpi page pixels inspected.

Trace 10 claims to their source records

C190A · P190

Intel documents an 8-pin / 2x4 +12 V processor-power connector form in the cited ATX design guide.

Claim scope: V36 catalogue-expansion identification fact only; not independent technical approval, fabrication data, wiring instruction or end-to-end compatibility proof.

Source links: S198 · Evidence trail → (private workspace)

C190B · P190

Intel ATX Version 3.0 Table 5-9 assigns positions 1–4 of the documented 8-pin +12 V processor-power connector to COM and positions 5–8 to +12V2 DC.

Claim scope: V37 engineering-depth sidecar fact; source-checked but not independently human-approved, not a fabrication drawing, and not a safe-substitution or repair instruction.

Source links: S215 · Evidence trail → (private workspace)

C190W · P190

SSI names Molex 39-01-2080 for its eight-position 2 × 4 processor/memory power connector. The exact Molex housing specification lists two rows and 4.20 mm mating-interface pitch.

Claim scope: Exact Molex39-01-2080 receptacle housing named in SSI PSDG2008v1.2.1 section4.2.2, component geometry only.

Source links: S977 · S760 · Evidence trail → (private workspace)

C806C · P190

Intel ATX v3 +12 V Power 8-pin connector: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S755 · S757 · S763 · Evidence trail → (private workspace)

C806D · P190

SSI 2008 PSDG processor 0 / memory 2x4 connector (Molex 39-01-2080): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S757 · S760 · S763 · Evidence trail → (private workspace)

C806E · P190

SSI 2008 PSDG processor 1 / memory 2x4 connector (Molex 39-01-2080): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S757 · S760 · S763 · Evidence trail → (private workspace)

C806F · P190

MSI MAG B550 TOMAHAWK CPU_PWR1 board header: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S761 · Evidence trail → (private workspace)

C806G · P190

GIGABYTE B550 AORUS ELITE (AX) ATX_12V board header: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S762 · Evidence trail → (private workspace)

C806H · P190

Intel rev 2.1a eight-pin CPU power: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S755 · S760 · S761 · S762 · S763 · Evidence trail → (private workspace)

C806I · P190

MSI B550-A PRO CPU_PWR1: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S757 · Evidence trail → (private workspace)

Prepare this page for review → (private workspace)Read the evidence method →

Recorded evidence only. An inspection date, publisher label, source link or generated packet is not independent technical review, hardware testing, fabrication approval or a compatibility verdict.