24 numbered positions plus C1–C5, including the analog return contact. The full DDWG Rev. 1.0 interface table is represented; exact product wiring can leave positions unused.
This pilot uses the documented view for DDWG DVI-I dual-link receptacle reference. It is not a general pinout, device compatibility check, wiring instruction or fabrication drawing.
The digital 24-position grid is shown separately from C1–C5. Analog-contact identifiers are REGISTERED BELOW, not plotted as a physical blade/cluster arrangement.
Source scopeDVI Revision 1.0 · 1999-04-02
Reading directionReceptacle front / mating side
Contact mappingNumbered layout, within exact cited view
Verify next: Inspect the DDWG/Molex receptacle drawing for the analog group and an exact plug drawing for any opposing view. No solder-side or partially populated cable map is inferred.
Additional identifiers, not spatially located
C1C2C3C4C5
Show source locator, claim and unresolved limitations
C015C · open this page’s canonical claim — Molex labels its numbered illustration as a DVI-I receptacle front view: the 1–8 row is above 9–16 and 17–24, with the analog group on the right. The DDWG plug and receptacle drawings use opposing views.
Source location: PDF p. 2: DVI-I Receptacle Connector Front View and signal roles; p. 3: single/dual-link and analog cable families; partially loaded plug note.
Limitations: Archived brochure, not evidence of current availability. Plug contacts may be partially loaded for a signal set. Do not transfer full receptacle assignments to unspecified cables or PCB terminals.
Profile unknowns: The flat digital blade is not an invented numbered signal 25. Different vendor counts can include or exclude it.
Rights: Original bounded factual paraphrase and links only. No source PDFs, artwork or logos redistributed. The indexed schematic is original, not a tracing of the source drawing.
Technical approval: pending · Rights approval: pending · Public release: withheld · Physical fit, polarity, voltage and device modes: not inferred.
Orientation
How to read this profile
DDWG Rev. 1.0 Tables 5-1/5-2 and Figures 5-1/5-3; receptacle viewed from its mating front, numbered grid on the left, position 1 upper-left and position 24 lower-right. The plug front is mirrored (Figure 5-5). Molex explicitly labels its combined diagram as a receptacle front view. Not a solder-side or PCB map.
Source-scoped identification facts
Each value retains its exact example, role and measurement axis. Facts from different parts must not be combined into an invented component.
Documented examples; not a mating drawing or compatibility approval
Nominal contacts
29S411 · S412 · S411 · S411 · S41424 numbered positions plus C1–C5, including the analog return contact.; nominal engineering count, not automatically positions, population or a device wiring map. 24 numbered positions plus C1–C5, including the analog return contact.
Contact rows
3 (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
Contact pitch
1.9 mm published contact centerline (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
Dimensions / axis
2.34 mm termination tail length (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
Connector role
socket (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
Coupling / latch
Mating lock; manufacturer also specifies keyed and polarized to mate/PCB (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
Manufacturer
Molex (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
Series
MicroCross DVI (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
Exact part / implementation
74320-1000 (74320-1000)S932Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. 74320-1000. Documented role: socket. Primary part identity linked to DVI-I in existing Molex-authored MicroCross brochureS412; current official exact-part specification independently read.; Limited-online-catalog notice preserved. Historical brochure pin sequencing and current exact component attributes remain separate. No universal DVI signal/capability inferred.
View convention
DDWG Rev. 1.0 Tables 5-1/5-2 and Figures 5-1/5-3; receptacle viewed from its mating front, numbered grid on the left, position 1 upper-left and position 24 lower-right. The plug front is mirrored (Figure 5-5). Molex explicitly labels its combined diagram as a receptacle front view. Not a solder-side or PCB map.S411 · S412 · S411 · S411 · S414Recorded source-scoped values; named examples do not describe every family variant or establish compatibility. Existing engineering orientation text; source/part/view remains controlling.
Not recorded: Positions / cavity span, Populated contacts, Contact gender / arrangement, Mounting, Keying / polarization, Shell / form, Recorded markings. Unknown fields stay unknown; illustrations supply no measurements or pin assignments.
Recorded variant and source limits
The flat digital blade is not an invented numbered signal 25. Different vendor counts can include or exclude it.
No housing dimensions, tolerances, insertion depth, PCB layout or fabrication approval is established.
Full receptacle contact presence is not evidence that a source, cable or receiver operates both links.
Do not apply voltage or modify connector pins based on a reference table. Exact device wiring and operating requirements remain separate.
DVI 1.0 combined analog and digital connector, all 29 contacts: Receptacle mating face, pin 1 upper left (Figure 5-3).
DDWG DVI 1.0 combined analog and digital connector (Table 5-2): Receptacle face per DDWG Fig. 5-3 (p. 46); numbering by contact number.
Apple Xserve (slot-load) graphics option DVI-I output (source device): Apple Figure 3-6 shows the DVI-I contact configuration. Rows are recorded by contact number only.
Euresys Picolo HD DVI-I input (capture/sink device): DVI-I socket (female) on the board. The page has no view statement.
DDWG Table 5-2 defines the combined interface as 24 numbered positions plus C1–C5. Pin 8 carries analog vertical sync, C1/C2/C3 carry analog color channels, C4 horizontal sync and C5 their analog return.
Molex labels its numbered illustration as a DVI-I receptacle front view: the 1–8 row is above 9–16 and 17–24, with the analog group on the right. The DDWG plug and receptacle drawings use opposing views.
Molex · MicroCross DVI Connector System — signal interface and cable assemblies ↗ PDF p. 2: DVI-I Receptacle Connector Front View and signal roles; p. 3: single/dual-link and analog cable families; partially loaded plug note. · Archived brochure, not evidence of current availability. Plug contacts may be partially loaded for a signal set. Do not transfer full receptacle assignments to unspecified cables or PCB terminals.
DDWG distinguishes a digital-only interface from a combined analog/digital interface; the digital-only receptacle lacks sockets for the analog pins. Dell distinguishes active conversion circuitry from passive adapters.
Dell · Video Display and Multiple Video Display General Information — DVI questions ↗ Article 000052929, version 13; modified 17 April 2026. First FAQ on dual link, E-Port dock note, and active/passive adapter definitions. · General article includes simplified descriptions and a broad conversion chart; those are not adopted as universal compatibility rules. E-Port wording is not an inventory of every dock revision.
C801Osource checked
DVI 1.0 combined analog and digital connector, all 29 contacts: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.
Digital Display Working Group (DDWG) · Digital Visual Interface (DVI) ↗ Section 2.6 Signal List (signal descriptions), p. 23 of 76; Section 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Section 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Section 5.2.6.1, Figure 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76; Sections 2.2.2.1-2.2.2.2 T.M.D.S. Link System/Monitor Requirements, p. 13 of 76 · Source scope and unresolved evidence are preserved in the engineering variant. Recorded original location/access note: http://www.ddwg.org/lib/dvi_10.pdf (retrieved from Internet Archive capture https://web.archive.org/web/20060630104414/http://www.ddwg.org:80/lib/dvi_10.pdf; ddwg.org no longer serves it)
Digital Display Working Group (DDWG) · Digital Visual Interface (DVI) ↗ Fig. 5-1 Digital-only Receptacle Connector Mating Interface Dimensions, p. 45 of 76; Sec. 2.2.2, Table 2-1 Single and Dual Link Operation and Sec. 2.2.2.1-2.2.2.2 link requirements, pp. 12-13 of 76; Sec. 2.6 Signal List (signal descriptions, link/channel mapping), p. 23 of 76; Sec. 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Sec. 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Sec. 5.2.6.1, Fig. 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76 · Source scope and unresolved evidence are preserved in the engineering variant.
DDWG DVI 1.0 combined analog and digital connector (Table 5-2): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.
Digital Display Working Group (DDWG) · Digital Visual Interface (DVI) ↗ Section 2.6 Signal List (signal descriptions), p. 23 of 76; Section 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Section 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Section 5.2.6.1, Figure 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76; Sections 2.2.2.1-2.2.2.2 T.M.D.S. Link System/Monitor Requirements, p. 13 of 76 · Source scope and unresolved evidence are preserved in the engineering variant. Recorded original location/access note: http://www.ddwg.org/lib/dvi_10.pdf (retrieved from Internet Archive capture https://web.archive.org/web/20060630104414/http://www.ddwg.org:80/lib/dvi_10.pdf; ddwg.org no longer serves it)
Digital Display Working Group (DDWG) · Digital Visual Interface (DVI) ↗ Fig. 5-1 Digital-only Receptacle Connector Mating Interface Dimensions, p. 45 of 76; Sec. 2.2.2, Table 2-1 Single and Dual Link Operation and Sec. 2.2.2.1-2.2.2.2 link requirements, pp. 12-13 of 76; Sec. 2.6 Signal List (signal descriptions, link/channel mapping), p. 23 of 76; Sec. 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Sec. 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Sec. 5.2.6.1, Fig. 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76 · Source scope and unresolved evidence are preserved in the engineering variant.
Apple Xserve (slot-load) graphics option DVI-I output (source device): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.
Digital Display Working Group (DDWG) · Digital Visual Interface (DVI) ↗ Fig. 5-1 Digital-only Receptacle Connector Mating Interface Dimensions, p. 45 of 76; Sec. 2.2.2, Table 2-1 Single and Dual Link Operation and Sec. 2.2.2.1-2.2.2.2 link requirements, pp. 12-13 of 76; Sec. 2.6 Signal List (signal descriptions, link/channel mapping), p. 23 of 76; Sec. 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Sec. 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Sec. 5.2.6.1, Fig. 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76 · Source scope and unresolved evidence are preserved in the engineering variant.
Euresys Picolo HD DVI-I input (capture/sink device): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.
Digital Display Working Group (DDWG) · Digital Visual Interface (DVI) ↗ Fig. 5-1 Digital-only Receptacle Connector Mating Interface Dimensions, p. 45 of 76; Sec. 2.2.2, Table 2-1 Single and Dual Link Operation and Sec. 2.2.2.1-2.2.2.2 link requirements, pp. 12-13 of 76; Sec. 2.6 Signal List (signal descriptions, link/channel mapping), p. 23 of 76; Sec. 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Sec. 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Sec. 5.2.6.1, Fig. 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76 · Source scope and unresolved evidence are preserved in the engineering variant.
Page scope: No new drawing. Existing original unnumbered artwork remains an identification illustration, not the numbered source view.
Assessment 2026-10-22 · earliest scheduled source review 2027-01-05. This is a recorded-date assessment, not a live source check. Page-level independent review is not established by this panel.
Digital Display Working Group (DDWG) · Unclassified publisher domain · inspected 2026-10-07 · due 2027-01-05
Within inspection window
Scoped support: Primary DDWG specification authored in 1999, read from an explicitly third-party document mirror. Digital-only and combined assignments, interface grouping and numbered receptacle/plug views.
Not established / limitations: Mirror hosting is not an official live DDWG publication channel. No independent authentication, fabrication approval, current product conformance, universal PCB layout or timing guarantee.
Locator: Printed/PDF pp. 43–47; Tables 5-1 and 5-2; Figures 5-1, 5-3 and 5-5.
Scoped support: Primary manufacturer brochure hosted by Mouser. Numbered DVI-I front view and named cable-family distinctions.
Not established / limitations: Archived brochure, not evidence of current availability. Plug contacts may be partially loaded for a signal set. Do not transfer full receptacle assignments to unspecified cables or PCB terminals.
Locator: PDF p. 2: DVI-I Receptacle Connector Front View and signal roles; p. 3: single/dual-link and analog cable families; partially loaded plug note.
Scoped support: Bounded use: 18 versus 24 grid positions; source/cable/display requirements; named E-Port single-link wiring despite accepting dual-link-shaped cables; active versus passive circuitry.
Not established / limitations: General article includes simplified descriptions and a broad conversion chart; those are not adopted as universal compatibility rules. E-Port wording is not an inventory of every dock revision.
Locator: Article 000052929, version 13; modified 17 April 2026. First FAQ on dual link, E-Port dock note, and active/passive adapter definitions.
Digital Display Working Group (DDWG) · Unclassified publisher domain · inspected 2026-10-20 · due 2027-01-18
Within inspection window
Scoped support: Exact named pinout variant only; not capability or compatibility approval.
Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant. Recorded original location/access note: http://www.ddwg.org/lib/dvi_10.pdf (retrieved from Internet Archive capture https://web.archive.org/web/20060630104414/http://www.ddwg.org:80/lib/dvi_10.pdf; ddwg.org no longer serves it)
Locator: Section 2.6 Signal List (signal descriptions), p. 23 of 76; Section 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Section 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Section 5.2.6.1, Figure 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76; Sections 2.2.2.1-2.2.2.2 T.M.D.S. Link System/Monitor Requirements, p. 13 of 76
Digital Display Working Group (DDWG) · Unclassified publisher domain · inspected 2026-10-20 · due 2027-01-18
Within inspection window
Scoped support: Exact named pinout variant only; not capability or compatibility approval.
Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.
Locator: Fig. 5-1 Digital-only Receptacle Connector Mating Interface Dimensions, p. 45 of 76; Sec. 2.2.2, Table 2-1 Single and Dual Link Operation and Sec. 2.2.2.1-2.2.2.2 link requirements, pp. 12-13 of 76; Sec. 2.6 Signal List (signal descriptions, link/channel mapping), p. 23 of 76; Sec. 5.2.1.1, Table 5-1 Digital-Only Connector Pin Assignments, p. 43 of 76; Sec. 5.2.1.2, Table 5-2 Combined Analog and Digital Connector Pin Assignments, p. 44 of 76; Sec. 5.2.6.1, Fig. 5-6 Analog Plug Connector Mating Interface Dimensions, p. 47 of 76
Scoped support: Exact named pinout variant only; not capability or compatibility approval.
Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.
Locator: Sheet 2 of 17, Table 1 Digital-Only Connector Pin Assignments (stated source: DVI Specification Revision 1.0); Sheet 3 of 17, Table 2 Combined Analog and Digital Connector Pin Assignments (stated source: DVI Revision 1.0)
DDWG Table 5-2 defines the combined interface as 24 numbered positions plus C1–C5. Pin 8 carries analog vertical sync, C1/C2/C3 carry analog color channels, C4 horizontal sync and C5 their analog return.
Claim scope: Combined interface assignment; analog and digital paths do not imply simultaneous multiple-display operation or exact source support.
Molex labels its numbered illustration as a DVI-I receptacle front view: the 1–8 row is above 9–16 and 17–24, with the analog group on the right. The DDWG plug and receptacle drawings use opposing views.
Claim scope: Read connector type and viewing side before applying numbers. Not a solder-side or PCB drawing.
DDWG distinguishes a digital-only interface from a combined analog/digital interface; the digital-only receptacle lacks sockets for the analog pins. Dell distinguishes active conversion circuitry from passive adapters.
Claim scope: A passive mechanical adaptation cannot establish an analog signal from a digital-only source. Exact direction, supported modes and power remain product-specific.
DVI 1.0 combined analog and digital connector, all 29 contacts: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.
Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.
DDWG DVI 1.0 combined analog and digital connector (Table 5-2): original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.
Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.
Recorded evidence only. An inspection date, publisher label, source link or generated packet is not independent technical review, hardware testing, fabrication approval or a compatibility verdict.
