FIELD GUIDESource-led reference

E193 · Source-scoped pinout variants

12VHPWR 16-contact auxiliary power connector engineering reference

Historical ATX Version 3.0 12VHPWR assignment. This profile does not claim equivalence to later 12V-2x6 revisions.

Source checked · no independent review claimed · Fabrication approved: no

12VHPWR 12+4 logical assignment (ATX 3.0 scope) original orientation schematic
Original pinout diagram; read the exact variant and view below. Not to scale.

Orientation

How to read this profile

Logical assignment only: power contacts 1–12 and sideband contacts S1–S4 as named by Intel. The V37 schematic is not a physical face view.

Bounded dimensions

Only what the sources support

Source-scoped dimensions; not fabrication clearances
FieldValueScopeEvidence
Power-contact spacing3 mmnominal identifier[C193B]

Source-scoped identification facts

Each value retains its exact example, role and measurement axis. Facts from different parts must not be combined into an invented component.

Documented examples; not a mating drawing or compatibility approval
Nominal contacts16S199Source-backed total of twelve larger plus four smaller contacts; not a pin assignment.
Contact pitch3 mm Power-contact spacingS216Recorded source-scoped values; named examples do not describe every family variant or establish compatibility. nominal_identifier; ATX 3.0 PCIe auxiliary-power cable plug / add-in-card header interface
Connector roleplug; header; PCB headerS199 · S216 · S561Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. ATX 3.0 PCIe auxiliary-power cable plug / add-in-card header interface IntelATX12VO613768Rev2.11 historical12VHPWR distinction. Documented role: PCB header. This isanexplicitcomparisonofolder12VHPWRandreplacement12V-2x6;H++isnottransferredto12VHPWR.; Noindividualspecimen,600Wcapability,markinglocationorunchangedheaderdimensionsclaimed. Existingdatedvariantsstayseparate.
SeriesIntelATX12VO613768Rev2.11 historical12VHPWR distinctionS561Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. IntelATX12VO613768Rev2.11 historical12VHPWR distinction. Documented role: PCB header. This isanexplicitcomparisonofolder12VHPWRandreplacement12V-2x6;H++isnottransferredto12VHPWR.; Noindividualspecimen,600Wcapability,markinglocationorunchangedheaderdimensionsclaimed. Existingdatedvariantsstayseparate.
Recorded markingsHistorical12VHPWR PCBconnector is documented with H+;replacement12V-2x6 usesH++.S561Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. IntelATX12VO613768Rev2.11 historical12VHPWR distinction. Documented role: PCB header. This isanexplicitcomparisonofolder12VHPWRandreplacement12V-2x6;H++isnottransferredto12VHPWR.; Noindividualspecimen,600Wcapability,markinglocationorunchangedheaderdimensionsclaimed. Existingdatedvariantsstayseparate.

Not recorded: Positions / cavity span, Populated contacts, Contact rows, Dimensions / axis, Contact gender / arrangement, Mounting, Coupling / latch, Keying / polarization, Shell / form, Manufacturer, Exact part / implementation, View convention. Unknown fields stay unknown; illustrations supply no measurements or pin assignments.

Recorded variant and source limits
  • This is the ATX 3.0 12VHPWR form, not a blanket statement about 12V-2x6 or later revisions.
  • No physical face orientation, insertion-depth measurement or cable-bend guidance is inferred here.
  • Use current PSU/GPU manufacturer documentation for an actual installation.
  • 12VHPWR cable plug, per Intel's statement that the renamed 12V-2x6 cable plug is unchanged: Identifiers per Table 5-7.
  • GIGABYTE GP-UD850GM-A PG5 'PCI-E 16 Pin' cable: Drawing on the cited page.
  • Intel guide rev 2.0 12VHPWR: Intel Figure 5-4 cable-plug assembly face drawing, sideband below: pin 1 lower left, pin 2 immediately right of it, pin 12 upper right; S1 left, S4 right. Not a PCB-header or cable wire-entry view.
  • Retained rows context (excluded from normalized contact/body field): 2. V36 catalogue-expansion identification fact only; not independent technical approval, fabrication data, wiring instruction or end-to-end compatibility proof. Sources: S199: PCIe auxiliary power connector section
  • Retained rows context (excluded from normalized contact/body field): 2. Printed page 63. A label comparison is not an assessment of an actual cable, seating, available power or exact manufacturer part. Sources: S561: Revision 2.11 / May 2024. Printed pages 17, 58, 59 and 63 visually inspected; page 63 special note compares 12V-2x6 and earlier 12VHPWR.
Report a correction to these facts →

Pins & wiring

Pinout

Choose the exact wiring. Pin numbers follow its stated view; a schematic does not establish physical positions. Check your exact device before wiring.

What the status labels mean
Confirmed
Recorded research passes agree within this variant; this is not independent human review or hardware validation.
Single source
Only one underlying document, or one pass, supports this assignment.
Device-specific
Supported for the named equipment or wiring only. Check your device’s manual.
Unverified
Missing or conflicting evidence. Do not wire from this row.
Not connected
The source explicitly says NC, no contact or no pin for this wiring.
Wiring variant

12VHPWR cable plug, per Intel's statement that the renamed 12V-2x6 cable plug is unchanged

View and evidence limits

Identifiers per Table 5-7.

  • P193 12VHPWR — **Agree** on all 16 identifiers — A uses the unchanged cable-plug statement in Intel rev 2.1a plus a GIGABYTE diagram. B retrieved Intel **rev 2.0** directly and its original 12VHPWR sideband sections, filling A's original-revision evidence gap. Different revisions of the same Intel guide are not independent issuers. Keep the old sense encoding separate from P260.
  • Intel rev 2.1a does not print a separately titled 12VHPWR table; it says the 12VHPWR name was changed to 12V-2x6 throughout and the cable plug did not change. The assignment is verified on that basis.
  • The original 12VHPWR (PCIe CEM 5.0 / Intel ATX 3.0 rev 2.0) SENSE0/SENSE1 power-level table was not obtained; Intel says rev 2.1 changed the 150 W and 0 W definitions. Only the 12V-2x6 encoding is recorded (under P260).
  • Earlier Intel revisions with the 12VHPWR-titled table were not available from the Intel host (requests refused).
12VHPWR 12+4 logical assignment (ATX 3.0 scope)Identifiers per Table 5-7.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: +12V3/V4 (single_source)12: +12V3/V4 (single_source)23: +12V3/V4 (single_source)34: +12V3/V4 (single_source)45: +12V3/V4 (single_source)56: +12V3/V4 (single_source)67: COM (single_source)78: COM (single_source)89: COM (single_source)910: COM (single_source)1011: COM (single_source)1112: COM (single_source)12S1: CARD_PWR_STABLE (single_source)S1S2: CARD_CBL_PRES# (single_source)S2S3: SENSE0 (single_source)S3S4: SENSE1 (single_source)S4powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
12VHPWR cable plug, per Intel's statement that the renamed 12V-2x6 cable plug is unchanged — source-scoped contact map
PinSignalWhat it doesStatus
1+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
2+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
3+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
4+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
5+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
6+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
7COMGround reference and return.Single source
Sources
8COMGround reference and return.Single source
Sources
9COMGround reference and return.Single source
Sources
10COMGround reference and return.Single source
Sources
11COMGround reference and return.Single source
Sources
12COMGround reference and return.Single source
Sources
S1CARD_PWR_STABLEControl, detection or configuration connection; check the source and device.Single source
Sources
S2CARD_CBL_PRES#Control, detection or configuration connection; check the source and device.Single source
Sources
S3SENSE0Control, detection or configuration connection; check the source and device.Single source
Sources
S4SENSE1Control, detection or configuration connection; check the source and device.Single source
Sources
Sources (1)

GIGABYTE GP-UD850GM-A PG5 'PCI-E 16 Pin' cable

Device-specific wiring. Check your device’s manual before connecting or applying power.

View and evidence limits

Drawing on the cited page.

  • P193 12VHPWR — **Agree** on all 16 identifiers — A uses the unchanged cable-plug statement in Intel rev 2.1a plus a GIGABYTE diagram. B retrieved Intel **rev 2.0** directly and its original 12VHPWR sideband sections, filling A's original-revision evidence gap. Different revisions of the same Intel guide are not independent issuers. Keep the old sense encoding separate from P260.
  • The GIGABYTE diagram calls the connector 'PCI-E 16 Pin' and does not use the name 12VHPWR; the PG5 series' connector naming was not confirmed from a GIGABYTE page.
  • The original 12VHPWR (PCIe CEM 5.0 / Intel ATX 3.0 rev 2.0) SENSE0/SENSE1 power-level table was not obtained; Intel says rev 2.1 changed the 150 W and 0 W definitions. Only the 12V-2x6 encoding is recorded (under P260).
  • Earlier Intel revisions with the 12VHPWR-titled table were not available from the Intel host (requests refused).
12VHPWR 12+4 logical assignment (ATX 3.0 scope)Drawing on the cited page.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: +12V (device_specific)12: +12V (device_specific)23: +12V (device_specific)34: +12V (device_specific)45: +12V (device_specific)56: +12V (device_specific)67: GND (device_specific)78: GND (device_specific)89: GND (device_specific)910: GND (device_specific)1011: GND (device_specific)1112: GND (device_specific)12S1: CARD_PWR_STABLE (device_specific)S1S2: CARD_CBL_PRES# (device_specific)S2S3: SENSE0 (device_specific)S3S4: SENSE1 (device_specific)S4powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
GIGABYTE GP-UD850GM-A PG5 'PCI-E 16 Pin' cable — source-scoped contact map
PinSignalWhat it doesStatus
1+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
2+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
3+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
4+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
5+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
6+12VPower connection (+12V). Check the specified supply.Device-specific
Sources
7GNDGround reference and return.Device-specific
Sources
8GNDGround reference and return.Device-specific
Sources
9GNDGround reference and return.Device-specific
Sources
10GNDGround reference and return.Device-specific
Sources
11GNDGround reference and return.Device-specific
Sources
12GNDGround reference and return.Device-specific
Sources
S1CARD_PWR_STABLEControl, detection or configuration connection; check the source and device.Device-specific
Sources
S2CARD_CBL_PRES#Control, detection or configuration connection; check the source and device.Device-specific
Sources
S3SENSE0Control, detection or configuration connection; check the source and device.Device-specific
Sources
S4SENSE1Control, detection or configuration connection; check the source and device.Device-specific
Sources
Sources (1)

Intel guide rev 2.0 12VHPWR

View and evidence limits

Intel Figure 5-4 cable-plug assembly face drawing, sideband below: pin 1 lower left, pin 2 immediately right of it, pin 12 upper right; S1 left, S4 right. Not a PCB-header or cable wire-entry view.

  • P193 12VHPWR — **Agree** on all 16 identifiers — A uses the unchanged cable-plug statement in Intel rev 2.1a plus a GIGABYTE diagram. B retrieved Intel **rev 2.0** directly and its original 12VHPWR sideband sections, filling A's original-revision evidence gap. Different revisions of the same Intel guide are not independent issuers. Keep the old sense encoding separate from P260.
  • Main power positions are all connected in the documented cable. Sideband contacts are signal circuits.
  • Table 3-6 SENSE0/SENSE1: ground/ground = 375 W initial / 600 W sustained; open/ground = 225/450 W; ground/open = 150/300 W.
  • Open/open = 100 W initial / 150 W maximum sustained. This historical H+ 12VHPWR behavior must not be replaced with the newer open/open 0 W behavior.
  • CEM full text, unnamed device optional sideband support, actual cable assemblies, proprietary PSU ends and connector qualification remain unverified.
12VHPWR 12+4 logical assignment (ATX 3.0 scope)Intel Figure 5-4 cable-plug assembly face drawing, sideband below: pin 1 lower left, pin 2 immediately right of it, pin 12 upper right; S1 left, S4 right. Not a PCB-header or cable wire-entry view.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manual1: +12V3/V4 (single_source)12: +12V3/V4 (single_source)23: +12V3/V4 (single_source)34: +12V3/V4 (single_source)45: +12V3/V4 (single_source)56: +12V3/V4 (single_source)67: COM (single_source)78: COM (single_source)89: COM (single_source)910: COM (single_source)1011: COM (single_source)1112: COM (single_source)12S1: CARD_PWR_STABLE (single_source)S1S2: CARD_CBL_PRES# (single_source)S2S3: SENSE0 (single_source)S3S4: SENSE1 (single_source)S4powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
Intel guide rev 2.0 12VHPWR — source-scoped contact map
PinSignalWhat it doesStatus
1+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
2+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
3+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
4+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
5+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
6+12V3/V4Power connection (+12V3/V4). Check the specified supply.Single source
Sources
7COMGround reference and return.Single source
Sources
8COMGround reference and return.Single source
Sources
9COMGround reference and return.Single source
Sources
10COMGround reference and return.Single source
Sources
11COMGround reference and return.Single source
Sources
12COMGround reference and return.Single source
Sources
S1CARD_PWR_STABLEControl, detection or configuration connection; check the source and device.Single source
Sources
S2CARD_CBL_PRES#Control, detection or configuration connection; check the source and device.Single source
Sources
S3SENSE0Control, detection or configuration connection; check the source and device.Single source
Sources
S4SENSE1Control, detection or configuration connection; check the source and device.Single source
Sources
Sources (4)

Unknowns stay unknown.

  • This is the ATX 3.0 12VHPWR form, not a blanket statement about 12V-2x6 or later revisions.
  • No physical face orientation, insertion-depth measurement or cable-bend guidance is inferred here.
  • Use current PSU/GPU manufacturer documentation for an actual installation.

Your next step

Use the detail without guessing past its limits.

Source trail

Claims and sources

C193Asource checked

Intel describes the 12VHPWR auxiliary-power connector form as twelve larger power contacts plus four smaller sideband contacts and distinguishes it from legacy 2x3/2x4 PCIe forms.

Intel · ATX Version 3.0 — PCI Express add-in card connectors ↗
PCIe auxiliary power connector section · Identification/reference scope only. V36 does not convert this source into a universal pinout, fabrication drawing, electrical approval or end-to-end compatibility verdict.

Back to first citation ↑
C193Bsource checked

Intel ATX Version 3.0 documents 12VHPWR with twelve larger power contacts plus four smaller sideband contacts, 3.0 mm power-contact spacing, pins 1–6 +12V3/V4, pins 7–12 COM, and sideband S1 CARD_PWR_STABLE, S2 CARD_CBL_PRES#, S3 SENSE0, S4 SENSE1.

Intel · ATX Version 3.0 — PCIe auxiliary power connector assignments ↗
Tables 5-4, 5-5 and 5-7; 12VHPWR connector description · Exact ATX 3.0 design-guide scope only. 12VHPWR is retained as the documented historical form and must not be silently generalized to later 12V-2x6 revisions or proprietary modular-PSU connectors.

C806Rsource checked

12VHPWR cable plug, per Intel's statement that the renamed 12V-2x6 cable plug is unchanged: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Intel Corporation · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide ↗
Revision history entry for 2.1 (printed p. 13): 12VHPWR renamed 12V-2x6 throughout, 'Cable Plug' side unchanged; Section 5.2.2.4.3 'Special Note on 12V-2x6 vs. 12VHPWR connectors' (printed p. 61); Table 5-7 (printed p. 66); Section 5.2.2.1, Table 5-1 Main Power Connector Pin-Out, printed p. 55; Section 5.2.2.2 Peripheral Connectors (AMP 1-480424-0 or Molex 15-24-4048), Table 5-2 Peripheral Connector Pin-out, printed pp. 55-56; Section 5.2.2.3 Floppy Drive Connector - Do Not Include (For Historical Reference Only), AMP 171822-4, Table 5-3 Floppy Connector Pin-out, printed p. 56; Section 5.2.2.4.1, Table 5-4 PCIe 2x3 Auxiliary Power Connector Pin Assignment (75 watts) and note 2, printed p. 57; Section 5.2.2.4.2, Table 5-5 PCIe 2x4 Auxiliary Power Connector Pin Assignment (150 Watts) and Table 5-6 Sense Pin Decoding, printed p. 58; Section 5.2.2.4.3, Table 5-7 PCIe 12V-2x6 Auxiliary Power Connector Pin Assignment (600 watts), printed p. 66; sideband definitions Section 3.3 and Table 3-6, printed pp. 29-32; Section 5.2.2.5, Table 5-9 +12 V Power 8 pin Connector Pin-Out, printed p. 67 · Source scope and unresolved evidence are preserved in the engineering variant.

C806Ssource checked

GIGABYTE GP-UD850GM-A PG5 'PCI-E 16 Pin' cable: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

GIGA-BYTE Technology · PSU Pinout Diagram - GP-UD850GM-A PG5 ↗
Page 'PCI-E 16 Pin', pin table and drawing; Page 'PCI-E 6+2 Pin', 'VGA Side' table and drawing · Source scope and unresolved evidence are preserved in the engineering variant.

C806Tsource checked

Intel guide rev 2.0 12VHPWR: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Intel Corporation · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide ↗
Mechanical > Connectors > DC Connectors > PCI-Express Add-in Card Connectors, 12VHPWR subsection, Table 5-7: PCIe 12VHPWR Auxiliary Power Connector Pin Assignment (600 watts); Figure 5-4: 12VHPWR Cable Assembly · Source scope and unresolved evidence are preserved in the engineering variant.

Intel Corporation · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide ↗
PCI Express Add-in Card Considerations > sideband signals > CARD_PWR_STABLE (Optional), function and implementation paragraphs · Source scope and unresolved evidence are preserved in the engineering variant.

Intel Corporation · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide ↗
PCI Express Add-in Card Considerations > sideband signals > CARD_CBL_PRES#, Primary Function, Secondary Function and termination paragraphs · Source scope and unresolved evidence are preserved in the engineering variant.

Intel Corporation · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide ↗
PCI Express Add-in Card Considerations > sideband signals > Sense1 / Sense0 (Required), Table 3-6 and configuration paragraphs · Source scope and unresolved evidence are preserved in the engineering variant.

8 source records support this profile. No independent engineering review or hardware validation is claimed.

Evidence behind this page

Scope first. Source second. Approval separate.

8 linked sources · 5 scoped claims · 0 sources with inspection/access flags.

Page scope: Original V37 logical-assignment schematic; not to scale and not a mating-face or manufacturing drawing.

Assessment 2026-10-22 · earliest scheduled source review 2027-01-03. This is a recorded-date assessment, not a live source check. Page-level independent review is not established by this panel.

Inspect 8 source scopes, access limits and dates

S199 · ATX Version 3.0 — PCI Express add-in card connectors

Intel · Manufacturer / product-owner domain · inspected 2026-10-05 · due 2027-01-03

Within inspection window

Scoped support: Identifies legacy 2x3 and 2x4 PCIe auxiliary-power forms and the 12VHPWR form with twelve larger power contacts plus four smaller sideband contacts.

Not established / limitations: Identification/reference scope only. V36 does not convert this source into a universal pinout, fabrication drawing, electrical approval or end-to-end compatibility verdict.

Locator: PCIe auxiliary power connector section

S216 · ATX Version 3.0 — PCIe auxiliary power connector assignments

Intel · Manufacturer / product-owner domain · inspected 2026-10-05 · due 2027-01-03

Within inspection window

Scoped support: Engineering-sidecar source for legacy PCIe 2x3/2x4 assignments and the ATX 3.0 12VHPWR 12+4 assignment/3.0 mm power-contact spacing context.

Not established / limitations: Exact ATX 3.0 design-guide scope only. 12VHPWR is retained as the documented historical form and must not be silently generalized to later 12V-2x6 revisions or proprietary modular-PSU connectors.

Locator: Tables 5-4, 5-5 and 5-7; 12VHPWR connector description

S755 · ATX Version 3 Multi Rail Desktop Platform Power Supply Design Guide

Intel Corporation · Manufacturer / product-owner domain · inspected 2026-10-20 · due 2027-01-18

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: Revision history entry for 2.1 (printed p. 13): 12VHPWR renamed 12V-2x6 throughout, 'Cable Plug' side unchanged; Section 5.2.2.4.3 'Special Note on 12V-2x6 vs. 12VHPWR connectors' (printed p. 61); Table 5-7 (printed p. 66); Section 5.2.2.1, Table 5-1 Main Power Connector Pin-Out, printed p. 55; Section 5.2.2.2 Peripheral Connectors (AMP 1-480424-0 or Molex 15-24-4048), Table 5-2 Peripheral Connector Pin-out, printed pp. 55-56; Section 5.2.2.3 Floppy Drive Connector - Do Not Include (For Historical Reference Only), AMP 171822-4, Table 5-3 Floppy Connector Pin-out, printed p. 56; Section 5.2.2.4.1, Table 5-4 PCIe 2x3 Auxiliary Power Connector Pin Assignment (75 watts) and note 2, printed p. 57; Section 5.2.2.4.2, Table 5-5 PCIe 2x4 Auxiliary Power Connector Pin Assignment (150 Watts) and Table 5-6 Sense Pin Decoding, printed p. 58; Section 5.2.2.4.3, Table 5-7 PCIe 12V-2x6 Auxiliary Power Connector Pin Assignment (600 watts), printed p. 66; sideband definitions Section 3.3 and Table 3-6, printed pp. 29-32; Section 5.2.2.5, Table 5-9 +12 V Power 8 pin Connector Pin-Out, printed p. 67

S766 · PSU Pinout Diagram - GP-UD850GM-A PG5

GIGA-BYTE Technology · Unclassified publisher domain · inspected 2026-10-20 · due 2027-01-18

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: Page 'PCI-E 16 Pin', pin table and drawing; Page 'PCI-E 6+2 Pin', 'VGA Side' table and drawing

S767 · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide

Intel Corporation · Manufacturer / product-owner domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: Mechanical > Connectors > DC Connectors > PCI-Express Add-in Card Connectors, 12VHPWR subsection, Table 5-7: PCIe 12VHPWR Auxiliary Power Connector Pin Assignment (600 watts); Figure 5-4: 12VHPWR Cable Assembly

S768 · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide

Intel Corporation · Manufacturer / product-owner domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: PCI Express Add-in Card Considerations > sideband signals > CARD_PWR_STABLE (Optional), function and implementation paragraphs

S769 · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide

Intel Corporation · Manufacturer / product-owner domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: PCI Express Add-in Card Considerations > sideband signals > CARD_CBL_PRES#, Primary Function, Secondary Function and termination paragraphs

S770 · ATX Version 3.0 Multi Rail Desktop Platform Power Supply Design Guide

Intel Corporation · Manufacturer / product-owner domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: PCI Express Add-in Card Considerations > sideband signals > Sense1 / Sense0 (Required), Table 3-6 and configuration paragraphs

Trace 5 claims to their source records

C193A · P193

Intel describes the 12VHPWR auxiliary-power connector form as twelve larger power contacts plus four smaller sideband contacts and distinguishes it from legacy 2x3/2x4 PCIe forms.

Claim scope: V36 catalogue-expansion identification fact only; not independent technical approval, fabrication data, wiring instruction or end-to-end compatibility proof.

Source links: S199 · Evidence trail → (private workspace)

C193B · P193

Intel ATX Version 3.0 documents 12VHPWR with twelve larger power contacts plus four smaller sideband contacts, 3.0 mm power-contact spacing, pins 1–6 +12V3/V4, pins 7–12 COM, and sideband S1 CARD_PWR_STABLE, S2 CARD_CBL_PRES#, S3 SENSE0, S4 SENSE1.

Claim scope: V37 engineering-depth sidecar fact; source-checked but not independently human-approved, not a fabrication drawing, and not a safe-substitution or repair instruction. This claim is explicitly historical 12VHPWR/ATX 3.0 scope and is not a 12V-2x6 equivalence claim.

Source links: S216 · Evidence trail → (private workspace)

C806R · P193

12VHPWR cable plug, per Intel's statement that the renamed 12V-2x6 cable plug is unchanged: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S755 · Evidence trail → (private workspace)

C806S · P193

GIGABYTE GP-UD850GM-A PG5 'PCI-E 16 Pin' cable: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S766 · Evidence trail → (private workspace)

C806T · P193

Intel guide rev 2.0 12VHPWR: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S767 · S768 · S769 · S770 · Evidence trail → (private workspace)

Prepare this page for review → (private workspace)Read the evidence method →

Recorded evidence only. An inspection date, publisher label, source link or generated packet is not independent technical review, hardware testing, fabrication approval or a compatibility verdict.