FIELD GUIDESource-led reference

E296 · Source-scoped pinout variants

PCI Express x4 64-position card-edge connector engineering reference

Amphenol PCI Express card-edge series context: 64 positions and 1.00 mm contact pitch for the x4 form.

Source checked · no independent review claimed · Fabrication approved: no

PCI Express x4 64-position card-edge engineering boundary original orientation schematic
Original pinout diagram; read the exact variant and view below. Not to scale.

Orientation

How to read this profile

V51 records position count and pitch only; it does not publish PCIe A/B-side logical assignments, card-outline keying dimensions or motherboard routing.

Bounded dimensions

Only what the sources support

Source-scoped dimensions; not fabrication clearances
FieldValueScopeEvidence
Contact pitch1 mmexample component[C296B]

Source-scoped identification facts

Each value retains its exact example, role and measurement axis. Facts from different parts must not be combined into an invented component.

Documented examples; not a mating drawing or compatibility approval
Nominal contacts64S337Source-backed nominal position/contact count for identification: 64. Not a pinout or manufacturing drawing.
Positions / cavity span64 (Claim C296A); 64 (Claim C296B)S337 · S357Recorded source-scoped values; named examples do not describe every family variant or establish compatibility. V50 identification fact only; no wiring, protocol compatibility, installation or fabrication approval is inferred. Mechanical/contact-count context only; no PCIe generation, lane enablement, logical pin assignment or board-layout approval is inferred.
Contact pitch1 mm Contact pitch (Recorded example component); 1 mm Source-described pitch / centerline (Claim C296B); 1 mm centerlineS357 · S337Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. example_component; PCI Express x4 card-edge connector example Mechanical/contact-count context only; no PCIe generation, lane enablement, logical pin assignment or board-layout approval is inferred. Named series only, not every family part: Amphenol PCI Express Gen3 64-position family. Documented role: socket. Family source explicitly mapsx1=36,x4=64,x8=98; no exactpart or connector size derived. Standalone retention mechanism varies by product.
Connector rolecard-edge; socketS337 · S357 · S337Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. PCI Express x4 card-edge connector example Named series only, not every family part: Amphenol PCI Express Gen3 64-position family. Documented role: socket. Family source explicitly mapsx1=36,x4=64,x8=98; no exactpart or connector size derived. Standalone retention mechanism varies by product.
ManufacturerAmphenol Communications SolutionsS337Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. Named series only, not every family part: Amphenol PCI Express Gen3 64-position family. Documented role: socket. Family source explicitly mapsx1=36,x4=64,x8=98; no exactpart or connector size derived. Standalone retention mechanism varies by product.
SeriesPCI Express Gen3 64-position card-edgeS337Named source examples retain separate role, part, view and axis limits; values are not a universal family specification. Named series only, not every family part: Amphenol PCI Express Gen3 64-position family. Documented role: socket. Family source explicitly mapsx1=36,x4=64,x8=98; no exactpart or connector size derived. Standalone retention mechanism varies by product.

Not recorded: Populated contacts, Contact rows, Dimensions / axis, Contact gender / arrangement, Mounting, Coupling / latch, Keying / polarization, Shell / form, Exact part / implementation, Recorded markings, View convention. Unknown fields stay unknown; illustrations supply no measurements or pin assignments.

Recorded variant and source limits
  • The card-edge form does not by itself establish PCIe generation, active lanes, bifurcation, electrical compliance, power budget or motherboard behavior.
  • Pitch and position count do not constitute a fabrication drawing, slot-compliance gauge or board-layout approval.
  • Beckhoff CB1061 PCIe x4 slot: §3.4.6/§3.4.7 numbered A/B contacts. Table header erroneously says x1 within x4 section; explicit x4 section and A1-A32/B1-B32 continuation govern.
  • PICMG design-guide x4 reference slot: Source schematic contact identities A1-A32 / B1-B32. The two columns are schematic symbol sides, not a verified mating-face or solder-side view.
Report a correction to these facts →

Pins & wiring

Pinout

Choose the exact wiring. Pin numbers follow its stated view; a schematic does not establish physical positions. Check your exact device before wiring.

What the status labels mean
Confirmed
Recorded research passes agree within this variant; this is not independent human review or hardware validation.
Single source
Only one underlying document, or one pass, supports this assignment.
Device-specific
Supported for the named equipment or wiring only. Check your device’s manual.
Unverified
Missing or conflicting evidence. Do not wire from this row.
Not connected
The source explicitly says NC, no contact or no pin for this wiring.
Wiring variant

Beckhoff CB1061 PCIe x4 slot

Device-specific wiring. Check your device’s manual before connecting or applying power.

View and evidence limits

§3.4.6/§3.4.7 numbered A/B contacts. Table header erroneously says x1 within x4 section; explicit x4 section and A1-A32/B1-B32 continuation govern.

  • P296 PCIe x4 — **Partial; reference-clock conflict remains** — Beckhoff implementation versus PICMG reference. Common four-lane placement aligns; Beckhoff's unconnected test/optional contacts remain separate from the reference's JTAG, B3 supply and reserved labels. B's A13/A14 clock polarity remains unverified. PICMG's explicitly permitted module-side data-polarity inversion is not treated as a connector reassignment.
PCI Express x4 64-position card-edge engineering boundary§3.4.6/§3.4.7 numbered A/B contacts. Table header erroneously says x1 within x4 section; explicit x4 section and A1-A32/B1-B32 continuation govern.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manualA1: PRSNT1# (device_specific)A1A2: 12V (device_specific)A2A3: 12V (device_specific)A3A4: GND (device_specific)A4A5: N/C (not_connected)A5A6: N/C (not_connected)A6A7: N/C (not_connected)A7A8: N/C (not_connected)A8A9: 3.3V (device_specific)A9A10: 3.3V (device_specific)A10A11: PERST# (device_specific)A11A12: GND (device_specific)A12A13: Not confirmed (unverified)A13A14: Not confirmed (unverified)A14A15: GND (device_specific)A15A16: PER0 (device_specific)A16A17: PER0# (device_specific)A17A18: GND (device_specific)A18A19: N/C (not_connected)A19A20: GND (device_specific)A20A21: PER1 (device_specific)A21A22: PER1# (device_specific)A22A23: GND (device_specific)A23A24: GND (device_specific)A24A25: PER2 (device_specific)A25A26: PER2# (device_specific)A26A27: GND (device_specific)A27A28: GND (device_specific)A28A29: PER3 (device_specific)A29A30: PER3# (device_specific)A30A31: GND (device_specific)A31A32: N/C (not_connected)A32B1: 12V (device_specific)B1B2: 12V (device_specific)B2B3: N/C (not_connected)B3B4: GND (device_specific)B4B5: SMBCLK (device_specific)B5B6: SMBDAT (device_specific)B6B7: GND (device_specific)B7B8: 3.3V (device_specific)B8B9: N/C (not_connected)B9B10: S3.3V (device_specific)B10B11: PEWAKE# (device_specific)B11B12: N/C (not_connected)B12B13: GND (device_specific)B13B14: PET0 (device_specific)B14B15: PET0# (device_specific)B15B16: GND (device_specific)B16B17: PRSNT2# (device_specific)B17B18: GND (device_specific)B18B19: PET1 (device_specific)B19B20: PET1# (device_specific)B20B21: GND (device_specific)B21B22: GND (device_specific)B22B23: PET2 (device_specific)B23B24: PET2# (device_specific)B24B25: GND (device_specific)B25B26: GND (device_specific)B26B27: PET3 (device_specific)B27B28: PET3# (device_specific)B28B29: GND (device_specific)B29B30: N/C (not_connected)B30B31: PRSNT2# (device_specific)B31B32: GND (device_specific)B32powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.
Beckhoff CB1061 PCIe x4 slot — source-scoped contact map
PinSignalWhat it doesStatus
A1PRSNT1#Control, detection or configuration connection; check the source and device.Device-specific
Sources
A212VPower connection (12V). Check the specified supply.Device-specific
Sources
A312VPower connection (12V). Check the specified supply.Device-specific
Sources
A4GNDGround reference and return.Device-specific
Sources
A5N/CNot connected or absent in this named wiring.Not connected
Sources
A6N/CNot connected or absent in this named wiring.Not connected
Sources
A7N/CNot connected or absent in this named wiring.Not connected
Sources
A8N/CNot connected or absent in this named wiring.Not connected
Sources
A93.3VPower connection (3.3V). Check the specified supply.Device-specific
Sources
A103.3VPower connection (3.3V). Check the specified supply.Device-specific
Sources
A11PERST#Reset control; check active level and the named device.Device-specific
Sources
A12GNDGround reference and return.Device-specific
Sources
A13Not confirmedNo settled assignment. Do not wire from this row.Unverified
Sources
A14Not confirmedNo settled assignment. Do not wire from this row.Unverified
Sources
A15GNDGround reference and return.Device-specific
Sources
A16PER0Control, detection or configuration connection; check the source and device.Device-specific
Sources
A17PER0#Control, detection or configuration connection; check the source and device.Device-specific
Sources
A18GNDGround reference and return.Device-specific
Sources
A19N/CNot connected or absent in this named wiring.Not connected
Sources
A20GNDGround reference and return.Device-specific
Sources
A21PER1Control, detection or configuration connection; check the source and device.Device-specific
Sources
A22PER1#Control, detection or configuration connection; check the source and device.Device-specific
Sources
A23GNDGround reference and return.Device-specific
Sources
A24GNDGround reference and return.Device-specific
Sources
A25PER2Control, detection or configuration connection; check the source and device.Device-specific
Sources
A26PER2#Control, detection or configuration connection; check the source and device.Device-specific
Sources
A27GNDGround reference and return.Device-specific
Sources
A28GNDGround reference and return.Device-specific
Sources
A29PER3Control, detection or configuration connection; check the source and device.Device-specific
Sources
A30PER3#Control, detection or configuration connection; check the source and device.Device-specific
Sources
A31GNDGround reference and return.Device-specific
Sources
A32N/CNot connected or absent in this named wiring.Not connected
Sources
B112VPower connection (12V). Check the specified supply.Device-specific
Sources
B212VPower connection (12V). Check the specified supply.Device-specific
Sources
B3N/CNot connected or absent in this named wiring.Not connected
Sources
B4GNDGround reference and return.Device-specific
Sources
B5SMBCLKClock or clock-control connection, as named by this source.Device-specific
Sources
B6SMBDATControl, detection or configuration connection; check the source and device.Device-specific
Sources
B7GNDGround reference and return.Device-specific
Sources
B83.3VPower connection (3.3V). Check the specified supply.Device-specific
Sources
B9N/CNot connected or absent in this named wiring.Not connected
Sources
B10S3.3VPower connection (S3.3V). Check the specified supply.Device-specific
Sources
B11PEWAKE#Control, detection or configuration connection; check the source and device.Device-specific
Sources
B12N/CNot connected or absent in this named wiring.Not connected
Sources
B13GNDGround reference and return.Device-specific
Sources
B14PET0Control, detection or configuration connection; check the source and device.Device-specific
Sources
B15PET0#Control, detection or configuration connection; check the source and device.Device-specific
Sources
B16GNDGround reference and return.Device-specific
Sources
B17PRSNT2#Control, detection or configuration connection; check the source and device.Device-specific
Sources
B18GNDGround reference and return.Device-specific
Sources
B19PET1Control, detection or configuration connection; check the source and device.Device-specific
Sources
B20PET1#Control, detection or configuration connection; check the source and device.Device-specific
Sources
B21GNDGround reference and return.Device-specific
Sources
B22GNDGround reference and return.Device-specific
Sources
B23PET2Control, detection or configuration connection; check the source and device.Device-specific
Sources
B24PET2#Control, detection or configuration connection; check the source and device.Device-specific
Sources
B25GNDGround reference and return.Device-specific
Sources
B26GNDGround reference and return.Device-specific
Sources
B27PET3Control, detection or configuration connection; check the source and device.Device-specific
Sources
B28PET3#Control, detection or configuration connection; check the source and device.Device-specific
Sources
B29GNDGround reference and return.Device-specific
Sources
B30N/CNot connected or absent in this named wiring.Not connected
Sources
B31PRSNT2#Control, detection or configuration connection; check the source and device.Device-specific
Sources
B32GNDGround reference and return.Device-specific
Sources
Sources (1)

PICMG design-guide x4 reference slot

View and evidence limits

Source schematic contact identities A1-A32 / B1-B32. The two columns are schematic symbol sides, not a verified mating-face or solder-side view.

  • P296 PCIe x4 — **Partial; reference-clock conflict remains** — Beckhoff implementation versus PICMG reference. Common four-lane placement aligns; Beckhoff's unconnected test/optional contacts remain separate from the reference's JTAG, B3 supply and reserved labels. B's A13/A14 clock polarity remains unverified. PICMG's explicitly permitted module-side data-polarity inversion is not treated as a connector reassignment.
  • This design guide is explicitly not a substitute for the PCI-SIG Card Electromechanical specification. No mechanical footprint or board mirror is supplied here.
  • A13/A14 reference-clock polarity conflicts between the PICMG guide and Mellanox manual remain unverified.
  • This is a source-scoped research map; PCI-SIG CEM normative revisions, later sideband assignments, exact card-side orientation and PCB termination mirrors were not independently established.
PCI Express x4 64-position card-edge engineering boundarySource schematic contact identities A1-A32 / B1-B32. The two columns are schematic symbol sides, not a verified mating-face or solder-side view.SCHEMATIC · physical positions unconfirmedNot to scale · check the named wiring and device manualA1: PRSNT1# (single_source)A1A2: +12V (single_source)A2A3: +12V (single_source)A3A4: GND (single_source)A4A5: JTAG2 (single_source)A5A6: JTAG3 (single_source)A6A7: JTAG4 (single_source)A7A8: JTAG5 (single_source)A8A9: +3.3V (single_source)A9A10: +3.3V (single_source)A10A11: PERST# (single_source)A11A12: GND (single_source)A12A13: Not confirmed (unverified)A13A14: Not confirmed (unverified)A14A15: GND (single_source)A15A16: HSIP_0 (single_source)A16A17: HSIN_0 (single_source)A17A18: GND (single_source)A18A19: RSVD5 (single_source)A19A20: GND (single_source)A20A21: HSIP_1 (single_source)A21A22: HSIN_1 (single_source)A22A23: GND (single_source)A23A24: GND (single_source)A24A25: HSIP_2 (single_source)A25A26: HSIN_2 (single_source)A26A27: GND (single_source)A27A28: GND (single_source)A28A29: HSIP_3 (single_source)A29A30: HSIN_3 (single_source)A30A31: GND (single_source)A31A32: RSVD6 (single_source)A32B1: +12V (single_source)B1B2: +12V (single_source)B2B3: +12V (single_source)B3B4: GND (single_source)B4B5: SMCLK (single_source)B5B6: SMDAT (single_source)B6B7: GND (single_source)B7B8: +3.3V (single_source)B8B9: JTAG1 (single_source)B9B10: 3.3VAUX (single_source)B10B11: WAKE# (single_source)B11B12: RSVD2 (single_source)B12B13: GND (single_source)B13B14: HSOP_0 (single_source)B14B15: HSON_0 (single_source)B15B16: GND (single_source)B16B17: PRSNT2# (single_source)B17B18: GND (single_source)B18B19: HSOP_1 (single_source)B19B20: HSON_1 (single_source)B20B21: GND (single_source)B21B22: GND (single_source)B22B23: HSOP_2 (single_source)B23B24: HSON_2 (single_source)B24B25: GND (single_source)B25B26: GND (single_source)B26B27: HSOP_3 (single_source)B27B28: HSON_3 (single_source)B28B29: GND (single_source)B29B30: RSVD3 (single_source)B30B31: PRSNT2#1 (single_source)B31B32: GND (single_source)B32powergrounddataConfigshieldNCUnknown
Schematic only · physical contact positions unconfirmed. Original drawing · not to scale. Scroll sideways if needed.

Not yet independently confirmed. No settled pin table is available for this wiring.

Sources (2)

Unknowns stay unknown.

  • The card-edge form does not by itself establish PCIe generation, active lanes, bifurcation, electrical compliance, power budget or motherboard behavior.
  • Pitch and position count do not constitute a fabrication drawing, slot-compliance gauge or board-layout approval.

Your next step

Use the detail without guessing past its limits.

Source trail

Claims and sources

C809Vsource checked

Beckhoff CB1061 PCIe x4 slot: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Beckhoff Automation GmbH & Co. KG · CB1061 Manual ↗
p.43 §3.4.6 Pinout PCI-express-x1 connector; pp.44-45 §3.4.7 PCI-express interface (x4), complete A1-A32/B1-B32 table · Source scope and unresolved evidence are preserved in the engineering variant.

C809Wsource checked

PICMG design-guide x4 reference slot: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

PICMG (manufacturer-hosted copy: Kontron) · COM Express Carrier Board Design Guide ↗
p. 37 Figure 7 PCI Express x1 Slot Example, J1 B3; p. 38, section 2.3.5.4, Figure 8 PCI Express x4 Slot Example, J2 contacts; p. 47 section 2.3.6.1 Polarity Inversion; p. 47 section 2.3.6.1 Polarity Inversion; p. 38 Figure 8 J2 A29/A30; p. 52, section 2.4.3.1, Figure 18 x1, x4, x8, x16 Slot, J5 connector-symbol pin labels · Source scope and unresolved evidence are preserved in the engineering variant.

Mellanox Technologies (NVIDIA official host) · ConnectX-3 Pro Ethernet Single and Dual SFP+ Port Adapter Card User Manual ↗
p. 55, Appendix A.2, Figure 15 PCIe Connector Pinout, J6 A13/A14 reference-clock labels; p. 55, Appendix A.2, Figure 15 PCIe Connector Pinout, all J6 contacts B1-B49/A1-A49 · Source scope and unresolved evidence are preserved in the engineering variant.

5 source records support this profile. No independent engineering review or hardware validation is claimed.

Discovery Quality III

Questions this record helps answer

All focused explainers →

Evidence behind this page

Scope first. Source second. Approval separate.

5 linked sources · 4 scoped claims · 0 sources with inspection/access flags.

Page scope: Original V51 engineering boundary schematic; not to scale and not a PCIe logical pinout, slot gauge or manufacturing drawing.

Assessment 2026-10-22 · earliest scheduled source review 2027-01-04. This is a recorded-date assessment, not a live source check. Page-level independent review is not established by this panel.

Inspect 5 source scopes, access limits and dates

S337 · Amphenol PCI Express card-edge series — x4 64-position form

Amphenol Communications Solutions · Manufacturer / product-owner domain · inspected 2026-10-06 · due 2027-01-04

Within inspection window

Scoped support: Manufacturer series reference for the PCI Express x4 mechanical/contact-count form only.

Not established / limitations: Source-backed identification does not establish universal wiring, protocol generation, device compatibility, safe installation or fabrication approval.

Locator: Product-series description and standard pin-count/lane-width summary

S357 · Amphenol PCI Express Gen 3 Card Edge Connectors engineering reference

Amphenol Communications Solutions · Manufacturer / product-owner domain · inspected 2026-10-06 · due 2027-01-04

Within inspection window

Scoped support: Manufacturer-series context for PCIe x1/x4/x8 card-edge contact counts and 1.00 mm pitch only.

Not established / limitations: Pitch and position count do not establish PCIe generation, lane enablement, bifurcation, board layout, electrical compliance or fabrication approval.

Locator: Series overview: 1.00 mm pitch and standard 36/64/98/164/280 position counts

S826 · COM Express Carrier Board Design Guide

PICMG (manufacturer-hosted copy: Kontron) · Unclassified publisher domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: p. 37 Figure 7 PCI Express x1 Slot Example, J1 B3; p. 38, section 2.3.5.4, Figure 8 PCI Express x4 Slot Example, J2 contacts; p. 47 section 2.3.6.1 Polarity Inversion; p. 47 section 2.3.6.1 Polarity Inversion; p. 38 Figure 8 J2 A29/A30; p. 52, section 2.4.3.1, Figure 18 x1, x4, x8, x16 Slot, J5 connector-symbol pin labels

S827 · ConnectX-3 Pro Ethernet Single and Dual SFP+ Port Adapter Card User Manual

Mellanox Technologies (NVIDIA official host) · Unclassified publisher domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: p. 55, Appendix A.2, Figure 15 PCIe Connector Pinout, J6 A13/A14 reference-clock labels; p. 55, Appendix A.2, Figure 15 PCIe Connector Pinout, all J6 contacts B1-B49/A1-A49

S830 · CB1061 Manual

Beckhoff Automation GmbH & Co. KG · Unclassified publisher domain · inspected 2026-10-21 · due 2027-01-19

Within inspection window

Scoped support: Exact named pinout variant only; not capability or compatibility approval.

Not established / limitations: Source scope and unresolved evidence are preserved in the engineering variant.

Locator: p.43 §3.4.6 Pinout PCI-express-x1 connector; pp.44-45 §3.4.7 PCI-express interface (x4), complete A1-A32/B1-B32 table

Trace 4 claims to their source records

C296A · P296

Amphenol identifies the standard PCI Express x4 card-edge connector form with 64 positions/contacts in its PCIe connector range.

Claim scope: V50 identification fact only; no wiring, protocol compatibility, installation or fabrication approval is inferred.

Source links: S337 · Evidence trail → (private workspace)

C296B · P296

Amphenol’s PCI Express card-edge series identifies a 64-position x4 connector at 1.00 mm pitch.

Claim scope: Mechanical/contact-count context only; no PCIe generation, lane enablement, logical pin assignment or board-layout approval is inferred.

Source links: S357 · Evidence trail → (private workspace)

C809V · P296

Beckhoff CB1061 PCIe x4 slot: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S830 · Evidence trail → (private workspace)

C809W · P296

PICMG design-guide x4 reference slot: original contact normalization. Statuses distinguish comparison agreement, source limits and named-device wiring.

Claim scope: Pinout variant only; see comparison and per-contact status. Not fabrication approval.

Source links: S826 · S827 · Evidence trail → (private workspace)

Prepare this page for review → (private workspace)Read the evidence method →

Recorded evidence only. An inspection date, publisher label, source link or generated packet is not independent technical review, hardware testing, fabrication approval or a compatibility verdict.